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ファイル名: High Performance, Low Cost DDR3- 1600Mbps+ Consumer Electronics Memory Interface Co-design

Paper presents a co-design approach for low cost, high performance consumer DDR3 memory interface. Design considerations are analyzed at every hierarchy (silicon/package/PCB) to meet performance and cost constraints. Strategies for cross talk suppression, impedance matching, power delivery, and signal phase matching are discussed with the goal of achieving DDR3-1600+; while cost conscious design considerations: die size optimization, wirebond package, 4-layer PCB stack up, HVM rules, regulator sharing, and PCB area reduction are analyzed to reflect cost savings. Hardware measurements prove the effectiveness of design in system.

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今すぐダウンロード: 110131_designcon_lu.pdf