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メディアライブラリの検索

ラムバスメディアライブラリには、ビデオやプレゼンテーション、テクニカル資料が集められています。検索を開始するには、検索したいトピック (「XDR 2」や「携帯」など) を以下に入力します。技術やイベント、年を指定して検索を絞り込むこともできます。たとえば、2009 年の DesignCon で発表された資料を検索したい場合、「あらゆる技術」、「DesignCon」、「2009 年」を選択します。


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The Rambus XDR™ memory architecture achieves an order of magnitude higher performance than today's standard memories with the fewest ICs. XDR DRAM powers today's best consumer electronic devices, including the Sony Playstation®3.

XDR™ Memory Architecture


Rambus Senior Engineering Manager Arun Vaidyanath demonstrates the latest Rambus test chip running in 3 modes: high-speed differential, GDDR5, and DDR3. Groundbreaking memory technologies developed by Rambus enable signaling at 20...

Terabyte Bandwidth Initiative Demo


The Mobile XDR™ memory architecture is the world's fastest and most power-efficient memory for mobile applications. Capable of achieving data rates of 3.2 to 4.3 Gigabits per second (Gbps) per pin at an unprecedented power efficiency of ...

Mobile XDR™ Video Presentation


Join us for an inspirational look at Rambus' 20-year commitment to innovation. Featuring Mike Farmwald and Mark Horowitz, Rambus founders, and former CEO Harold Hughes.

A Company of Inventors


Rambus' TV ad based on stop-motion animation

"At the Heart of the Products You Love" Commercial


The making of our stop-motion TV commercial

Behind the Scenes: "At the Heart of the Products You Love" Commercial


See the demo of a silicon-proven XDR™2 board achieving the industry's highest memory bandwidth. Rob Dhat, Solutions Marketing Manager, walks through the advantages of XDR 2 DRAM over GDDR5.

XDR™2 Video Demonstration


Rambus innovations can provide the power efficiency and performance needed in future compute memory systems beyond DDR3. Watch this video to learn more!

Beyond DDR3: Advancing the Main Memory Roadmap


Kendra DeBerti runs through a demo of the XDR-XDR 2 Memory Architecture, highlighting a bimodal XIO memory controller and speeds up to 7.2Gbps.

XDR and XDR™2 Memory Architecture: Performance and Power-Efficiency


Rambus innovations enable our DDR3 PHY solution to support data rates of up to 1600 megatransfers per second (MT/s) in a low-cost wire bond package. Watch this video to see the test chip in action.

DDR3 Memory Controller Interface: High-Performance Demo

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