Dynamic Point-to-Point Technology

Background

As memory bus speeds continue to increase, maintaining good signal integrity becomes increasingly difficult. Conventional memory buses in personal computers and workstations support multi-drop data topologies, which allow more than one device per data signal. These topologies support upgradeability by allowing multiple modules to be plugged into the bus, providing benefits to system manufacturers and end users. However, multi-drop topologies can degrade signal integrity, reducing the speed at which the memory bus can run. In multi-drop topologies, one factor that determines the speed of the memory bus is the worst-case loading characteristics, in which all connectors are populated with memory modules. Point-to-point topologies (one device at each end of the signal line) have better signal integrity properties and permit higher bus speeds, but cannot be upgraded because they do not allow multiple modules. The ability to increase memory system capacity by adding memory modules is such an important feature in computer systems today, that traditional main memory systems support multi-drop topologies instead of point-to-point topologies. In the early 2000s, Rambus began investigating how to combine the benefits of point-to-point signaling with the ability to upgrade memory capacity.

What Is Dynamic Point-to-Point Technology?

Dynamic Point-to-Point (DPP) technology combines the benefits of both point-to-point and multi-drop topologies, allowing the creation of memory systems using point-to-point signaling with the flexibility to add memory capacity through module upgrades. A key benefit of DPP technology is that by providing capacity expansion, DPP technology allows point-to-point upgrades at full memory system bandwidth. DPP technology can be applied to many different types of memory technologies, including XDR DRAM, SDRAM, DDR SDRAM, and DDR2 SDRAM. Figures 1 and 2 illustrate how DPP technology can be used in an XDR DRAM memory system. As shown in Figure 1, the base system configuration has a single memory module, with this module supplying all of the memory bandwidth across the full datapath width. A continuity module occupies the second memory slot, providing electrical continuity that maintains the point-to-point connection across half of the datapath.

When the continuity module is removed and an expansion module is added (as shown in Figure 2), the datapath is reconfigured to supply memory bandwidth from both modules. In this example, each module supplies half of the memory system bandwidth across a different half of the datapath in a point-to-point topology. Using DPP technology, the single 32-bit module is "dynamically rewired" to become a 16-bit module when the second module is added. XDIMM modules accomplish this by changing the width of the memory devices on the XDIMM module. In this case, the XDR DRAMs switch from being x4 DRAMs in the base single module configuration to x2 DRAMs in the upgraded module configuration. In the x4 mode, each XDR DRAM supplies four bits of data, two bits directly to the ASIC and two bits through the continuity module to the ASIC. When an upgrade module is inserted, the path through the continuity module is broken and the devices switch to x2 mode. In x2 mode, each XDR DRAM supplies two bits of data directly to the ASIC.

Before and after the capacity upgrade, point-to-point signaling is maintained, allowing memory system bandwidth to be maintained. The dynamic rewiring in DPP technology allows the memory system to retain the signal integrity benefits of point-to-point signaling while enabling memory system capacity expansion at full memory system bandwidth. DPP technology can be used in conjunction with FlexPhase technology, together forming a compelling framework for memory system architecture.

Who Benefits?

DPP technology provides benefits to the following groups:

• System designers. Because traditional memory systems use multi-drop topologies that can reduce signal integrity and limit the speed of the memory bus, systems designers can face difficulties increasing memory bus speeds. The improved signal integrity that DPP technology provides frees memory bus speeds from multi-drop signaling constraints. DPP technology also allows system designers to increase memory capacity without sacrificing signal integrity.
• System integrators. Like system designers, system integrators benefit from the improved signal integrity that DPP technology provides, allowing more robust systems to be created.
• Consumers. Consumers benefit from the increased signal integrity provided by DPP technology, and can upgrade systems without sacrificing signal integrity.