LPDDR2 Innovations

Since the early 1990’s, Rambus has been actively developing breakthrough memory inventions and solutions that have enabled new levels of performance and low power. Early on, Rambus engineers recognized that future memory performance increases would be limited by power and efficiency bottlenecks. As a result, they developed many advanced power management and memory efficiency innovations that are widely used in many memory types today. Some of these innovations are critical in enabling next generation mobile memory systems, such as LPDDR2 and Mobile XDR memory. In particular, patented Rambus innovations in LPDDR2 mobile memory include:

• Double Bus Rate Control – Doubles the per-pin signaling rate for both address/control to improve bandwidth efficiency and performance.
• Strobed Write – Improves timing and efficiency of write operations using strobe timing signals.
• I/O Power Mode Management – Coordinates the control I/O and clocking circuits to save power for very low power system states, such as Deep Power-Down.
• External and Self Refresh Continuity – Manages refresh addressing with transitions into and out of low power Self Refresh modes.

Background

Future mobile devices, such as smartphones, tablets, and notebooks, will push performance and power with a rich array of applications, such as realistic 3D gaming, HD video capture, and rich visual communication and user interfaces. The memory system will be a key enabler for these demanding mobile applications. However, mobile systems present some fundamental limits that make it particularly challenging to deliver higher memory system performance. For instance, low system cost and small form factor constraints require smaller, low cost packages, which limits package ball counts and interface bus widths. Pushing higher memory throughput over this limited package interface requires faster electrical signaling, more accurate timing techniques, and more efficient protocol technologies.

Another fundamental limit is battery life. End-users now expect all day battery life, even as they increase their usage of bandwidth demanding applications. In order to deliver higher bandwidth with a fixed or reduced power budget, next generation mobile memories must incorporate more power efficient I/O circuits, active power management techniques, and advanced power modes.

Innovations

Numerous Rambus innovations, including many that have already been proven in compute and graphics applications, address these challenges for mobile memory systems. Specifically, patented Rambus innovations in LPDDR2 address both performance efficiency and power management and include:

• Efficiency Features
• Double Bus Rate Control – Doubles the per-pin signaling rate for address/control and/or data to improve bandwidth efficiency and performance.
• Strobed Write – Improves timing and efficiency of write operations using strobe timing signals.
• External and Self Refresh Continuity - Manages refresh addressing with transitions into and out of low power Self Refresh modes in order to improve channel and memory efficiency, as well as reduce controller complexity.
• Strobed Write Burst Terminate - Allows a memory controller to write data bursts of arbitrary lengths, increasing bus efficiency.
• Variable Burst Length - Improves data transfer efficiency by allowing varying amounts of data to be sent per a memory read or write request.
• Core Prefetch - Improves interface bandwidth while allowing the core to operate at a lower frequency.
• Programmable Read Latency - Allows a memory component to operate at higher frequencies by more efficiently scheduling internal memory timings.

• Power Management Features
• I/O Power Mode Management – Coordinates the control of I/O and clocking circuits to save power for low power modes, such as Deep Power-Down.
• External and Self Refresh Continuity – Manages refresh addressing with transitions into and out of low power Self Refresh modes.
• Temperature Compensated Self-Refresh (Optional) – Enables lower memory power during self-refresh by compensating the refresh rate based on temperature.