Mobile XDR™ Memory Architecture

The Mobile XDR™ memory architecture is the world's fastest and most power-efficient memory for mobile applications. Capable of achieving data rates of 3.2 to 4.3Gigabits per second (Gbps) per pin at an unprecedented power efficiency of 2.2milliwatts per Gigabit per second (mW/Gbps), Mobile XDR is a complete memory solution ideal for the low-power and high-performance requirements of next-generation smartphones, netbooks, and mobile gaming and multimedia products.

Mobile XDR memory can meet the growing performance demands of future mobile systems driven by applications such as HD video capture and encoding, and 3D gaming. In addition, Mobile XDR memory's high performance at unmatched power efficiency can deliver extended battery life in next-generation mobile products. Further, the Mobile XDR architecture supports the use of existing manufacturing processes and infrastructure which lowers cost, reduces risk and speeds time to market.

The Mobile XDR memory architecture satisfies the bandwidth requirements of future mobile systems with the fewest number of devices possible. Each Mobile XDR DRAM can deliver 12.8 to 17GigaBytes per second (GB/s) of bandwidth from a single, 4-byte-wide device.

The Mobile XDR memory architecture provides a total system solution which is comprised of the Mobile XDR Controller IO Cell (MIO) and the Mobile XDR Digital Memory Controller (MMC) which are implemented in an SoC such as an application or media processor, and the Mobile XDR DRAM. The MIO, MMC, and Mobile XDR DRAM designs are compatible with mainstream, cost-effective SoC and DRAM manufacturing environments and process roadmaps.

Born of the Mobile Memory Initiative

The Mobile XDR memory architecture builds on the foundation of innovations developed as part of Rambus' Mobile Memory Initiative including:

• Very Low-Swing Differential Signaling (VLSD) - combines the robust signaling qualities of a differential architecture with innovative circuit techniques to greatly reduce active power consumption.


• FlexClocking™ Architecture - a clock-forwarded and clock-distributed topology, enables high-speed operation and a simplified DRAM interface.


• Advanced Power State Management (APSM) - in conjunction with the FlexClocking architecture, provides fast switching times between power-saving modes and delivers optimized power efficiency across a diverse range of usage profiles.

In addition to VLSD, FlexClocking architecture, and APSM, the Mobile XDR architecture features the following Rambus innovations:

• Micro-threading Technology - reduces row and column access granularity resulting in a significant performance benefit for applications dealing with small data objects.


• FlexLink™ C/A - provides the command and address information to a DRAM using a single, differential high speed communications channel.


• Fully Differential Memory Architecture (FDMA) - enables higher speed, lower noise and lower power in high performance memory systems.


• Dynamic Point-to-Point (DPP) - enables memory upgrades and expandable capacity while maintaining high-performance point-to-point signaling.