Understanding the memory-storage pyramid
Loren Shalinsky, a Strategic Development Director at Rambus, recently penned a detailed article for Semiconductor Engineering that explores the memory-storage hierarchy. As he puts it,
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Loren Shalinsky, a Strategic Development Director at Rambus, recently penned a detailed article for Semiconductor Engineering that explores the memory-storage hierarchy. As he puts it,
The projected adoption rate of DDR4 as the dominant industry memory standard was a major topic of discussion at Intel’s Developer Forum earlier this month,
Bob O’Donnel of TECHnalysis Research recently published a white paper describing the critical role memory server chipsets play in facilitating high-speed DDR4 designs. “With the introduction
Ely Tsern, VP and chief technologist for the Rambus Memory and Interfaces division, recently sat down with Nicole Hemsoth of The Platform to discuss the
Writing for PC Magazine, Michael J. Miller notes that although most of the discussion around Moore’s Law has thus far focused on logic chips, the
Loren Shalinsky, a Strategic Development Director at Rambus, recently penned an article for Semiconductor Engineering that explores how server market growth has prompted a salient increase