Memory PHYs

>Memory PHYs

Building a robust HBM2 PHY

What is HBM? HBM is a high-performance memory that features reduced power consumption and a small form factor. More specifically, it combines 2.5D packaging with a wider interface at a lower clock speed (as compared [...]

The Rambus HBM GEN2 PHY: A closer look

Earlier this week, Rambus announced the availability of its new High Bandwidth Memory (HBM) Gen2 PHY. Designed for systems that require low latency and high bandwidth memory, the Rambus HBM PHY, built on the GLOBALFOUNDRIES [...]

Rambus launches High Bandwidth Memory PHY on GLOBALFOUNDRIES 14nm LPP

Rambus has announced the availability of its High Bandwidth Memory (HBM) Gen2 PHY developed for the GLOBALFOUNDRIES FX-14TM ASIC Platform. Designed for systems that require low latency and high bandwidth memory, the Rambus HBM PHY, built [...]

Rambus is at DesignCon 2017


The DesignCon 2017 expo kicks off on February 2nd in Santa Clara. We’re at booth #833, showcasing our comprehensive suite of Ethernet, PCIe and DDRn IP solutions to solve today’s most challenging data center and [...]

Rambus microsite goes live on The Next Platform

, , , ,

A new microsite curated by Rambus is now live on The Next Platform. According to Kendra De Berti, Director, Solutions Marketing at Rambus, the microsite hosts a wide range of in-depth content on applications from [...]

Intel says DDR4 is ramping quickly


Last week at IDF 2016, Intel executive Geof Findley presented a comprehensive overview of the memory industry ecosystem. According to Findley, DDR4 is ramping quickly and should hit 31% of shipments during the second quarter [...]

ChipEstimate and Rambus look beyond DDR4


Frank Ferro, a senior director of product management at Rambus, has penned an article for ChipEstimate about the future of DRAM in the age of the IoT. According to Ferro, the semiconductor industry has traditionally relied [...]

EE Times takes a closer look at Rambus’ 14nm R+ DDR4 PHY

Gary Hilson of the EE Times has covered Rambus’ recent announcement about the development of its R+ DDR4 PHY on GLOBALFOUNDRIES 14nm LPP process. As the journalist notes, the silicon is the first production-ready 3200 [...]

R+ DDR4 PHY developed on GLOBALFOUNDRIES 14nm LPP process

Rambus has confirmed the development of its R+ DDR4 PHY on the GLOBALFOUNDRIES 14nm LPP process. “As part of a comprehensive suite of memory and SerDes interface offerings for networking and data center applications, we [...]

Optimizing memory bandwidth

Frank Ferro, a senior director of product management at Rambus, recently sat down with Ed Sperling of Semiconductor Engineering and other industry participants to discuss the slew of new memory initiatives and entrants. According to [...]

Exploring 2.5D packaging and beyond


Frank Ferro, a Senior Director of Product Marketing at Rambus, recently participated in a Semiconductor Engineering roundtable discussion about 2.5D and advanced packaging. According to Ferro, 2.5D can succeed if customer demand overcomes the additional [...]

From consoles to VR


The Atari 2600 (or VCS) – which hit the nascent video game market back in 1977 – packed 128 bytes RAM and an 8-bit MOS 6507 CPU clocked at a mere 1.19 MHz. According to [...]

Architecting new memory for the IoT

The once indefatigable Moore’s Law is beginning to slow, even as data, driven by a burgeoning Internet of Things (IoT), continues to increase exponentially. Consequently, a slew of new memory architectures, including those utilizing 2.5D [...]

ReRAM gains traction in the memory space

Writing for Semiconductor Engineering, Michael Watts reports that Resistive RAM (ReRAM) appears to be gaining traction. “Once considered a universal memory candidate—a replacement for DRAM, flash and SRAM—ReRAM is carving out a niche between DRAM [...]

Rambus is @ ARMTechCon 2015

, ,

Rambus – a silver sponsor of ARM TechCon 2015 – is kicking off the show this morning with a series of live demos centered on the burgeoning Internet of Things (IoT). “The vision of the [...]

When memory and storage converge

Earlier this week, Rambus Chief Scientist Craig Hampel gave a keynote presentation at MemCon 2015 that explored the increasingly blurred lines between memory and storage. As Hampel notes, devices used as memory are typically volatile, [...]

Moore’s Law: From 16 kB to 16GB


James Sanders of TechRepublic has confirmed that 16 GB SO-DIMM modules are now starting to become generally available from multiple vendors. “[This] eases RAM constraints in devices that have a limited number of slots for [...]

Minding the memory gap

Mark LaPedus of Semiconductor Engineering recently reported that memory chips and storage devices are struggling to keep pace with the growing demands of data processing. “To solve the problem, chipmakers have been working on several next-generation [...]

Memory price dip to spur DDR4 adoption

KitGuru’s Anton Shilov reports that DDR4 prices have dropped approximately 25% since late June. “According to DRAMeXchange, the world’s leading computer memory tracker, one 4Gb DDR4 chip rated to run at 2133MHz cost $3.618 on [...]

Building bridges with DRAM vendors


Analysts at IHS Electronics say Rambus’ change in strategy from intellectual property (IP) licensing house to chipmaker has been “well received” by its customers. “Rambus has announced recently that it would begin developing server memory [...]

Understanding the memory-storage pyramid

Loren Shalinsky, a Strategic Development Director at Rambus, recently penned a detailed article for Semiconductor Engineering that explores the memory-storage hierarchy. As he puts it, the hierarchy, or pyramid, is a particularly succinct method of [...]

Navigating the DDR4 adoption road map

The projected adoption rate of DDR4 as the dominant industry memory standard was a major topic of discussion at Intel’s Developer Forum earlier this month, with the company confirming DDR4-2400 support for its upcoming Xeon [...]

TECHnalysis Research talks Rambus server memory chipsets


Bob O’Donnel of TECHnalysis Research recently published a white paper describing the critical role memory server chipsets play in facilitating high-speed DDR4 designs. “With the introduction of DDR4, server system designers can leverage DRAM that runs [...]

Ely Tsern talks memory interface chipsets with The Platform


Ely Tsern, VP and chief technologist for the Rambus Memory and Interfaces division, recently sat down with Nicole Hemsoth of The Platform to discuss the launch of the company’s server memory interface chipset. “Memory today, [...]

Is DRAM adhering to Moore’s Law?

Writing for PC Magazine, Michael J. Miller notes that although most of the discussion around Moore’s Law has thus far focused on logic chips, the memory industry has clearly entered a transitional stage. “DRAM shrinks [...]

Server market growth tied to increased memory demand


Loren Shalinsky, a Strategic Development Director at Rambus, recently penned an article for Semiconductor Engineering that explores how server market growth has prompted a salient increase in memory demand. “A high-end server can have 48 or [...]

PC World packs 128GB of DDR4 – into a single PC

PC World executive editor Gordon Mah Ung recently announced that his team successfully “smashed right through” the traditional 64GB system RAM barrier. “[The] barrier has vexed consumer computing for years now. Mainstream desktop PCs have [...]

Increasing crop yields with Big Data


The Farmers Business Network (FBN) is currently working on an initiative to break down agricultural data on millions of acres of U.S. farmland – while providing real-world results on the performance of various seed and [...]

Report: Intel Skylake Xeons could feature 28 cores, 6 memory channels

ExtremeTech’s Joe Hruska recently analyzed a set of leaked slides that suggest Intel’s plans for its upcoming Xeon cores may “stretch farther into the stratosphere” than originally predicted. “[The] new data purports to show Intel’s [...]

Report: Intel’s Skylake-S is primed for DDR4


Writing for KitGuru, Anton Shilov says Intel’s upcoming Skylake-S architecture will promote DDR4 “considerably more aggressively” than initially believed. “Although [the] integrated memory controller of Skylake supports different types of DRAM, the processors will not [...]

The DDR5-HBM connection


Frank Ferro, senior director of product marketing at Rambus, recently told SemiconductorEngineering’s Ed Sperling that he was looking forward to seeing what the company could do for next-gen DDR5 as well as evolving high-bandwidth memory [...]

Navigating Big Data analytics


Intel VP and General Manager Ron Kasabian recently described the extraction of meaningful information from raw data as a “key enabler” of the new digital service economy. “In this new era, an organization’s competitive edge [...]

PayPal deploys ARM-based X-Gene servers

Applied Micro CEO and president Paramesh Gopi recently confirmed that PayPal has “deployed and validated” the ARM-powered X-Gene server-on-a-chip. According to Gopi, Paypal represents one of the many hyperscale data center customers the company is [...]

Smartwatch teardowns reveal 512MB of memory

Recent teardowns of two popular smartwatches – the Apple Watch Sport and LG Urbane – have confirmed that each device packs 512MB of memory. More specifically, the Apple Watch Sport is equipped with 512MB of [...]

Mobile DRAM to see stable price trends in 2015

Avril Wu, the Assistant Vice President of DRAMeXchange, says he expects mobile DRAM to see stable price trends in 2015. It should be noted that mobile DRAM currently accounts for over 40% of total DRAM [...]

ARM and Rambus: A Common Denominator


Writing for 24/7 Wall St, analyst Chris Lange notes that both ARM and Rambus license their respective architecture and designs to industry processor and memory industry players. “Rambus operates as an international technology solutions company. [...]

GeIL’s Super Luce is DDR4 eye candy

GeIL has announced its slick DDR4 Super Luce lineup. Boasting colors of white, red or blue, the kits are expected to range from DDR4-2666 MHz to DDR4-3400 MHz and up to 64GB capacity. “The principle [...]

Rambus celebrates 25 years of innovation

, , ,

Founded in 1990 by Mark Horowitz and Mike Farmwald, Rambus scientists and engineers have spent the past quarter of a century bringing invention to market. “Rambus has a rich, 25-year history of developing and licensing [...]

Rambus licenses patents and technology to IBM

Rambus has signed both a patent and a technology license agreement with IBM. According to Frank Ferro, senior director of product management at Rambus, the agreement authorizes the integration of Rambus’ memory and serial link [...]

Semiconductor Engineering goes 1:1 with Steven Woo


Ernest Worthman of Semiconductor Engineering recently interviewed Steven Woo, a VP and distinguished inventor at Rambus. The two discussed the numerous challenges facing the rapidly evolving Internet of Things (IoT), including security and low power [...]

AnandTech analyzes DDR4 and beyond

Writing for AnandTech, Ian Cutress recently explained why DDR4 was first launched in the enthusiast space. “On the server side, any opportunity to use lower power and drive cooling costs down is a positive, so [...]

iRunway report highlights seminal Rambus patents

A recent iRunway report on the semiconductor memory landscape ranked Rambus in the fourth position of the top ten seminal patent holders in DRAM technology. “In order to determine which patents are seminal iRunway analyzed [...]

Mobile DRAM industry valued at over $3.6 billion

DRAMeXchange, a division of TrendForce, recently confirmed worldwide mobile DRAM revenue of US$3.607 billion in the fourth quarter of 2014 – representing 27.8% of DRAM industry value and a 4.2% quarterly increase. In addition, mobile [...]

From GDDR to HBM

A recent KitGuru report suggests AMD has designed its upcoming Radeon R9 380X with high bandwidth memory, or HBM, a next-gen stacked DRAM memory standard. “Although HBM provides DDR3 – like bit rate per pin [...]

R+ DDR4/3 PHY developed on Samsung’s 28nm LPP process

Rambus has officially confirmed that its R+™ DDR4/3 PHY was developed using Samsung’s 28nm LPP process. “Our ongoing collaboration with Samsung has yielded a robust, production-ready R+ DDR4/3 PHY on the power-performance optimized 28nm Low [...]

DDR4 deployment averts “thermal nightmare”

Writing for DataCenter Dynamics, Scott Fulton notes that recent benchmark results indicate DDR4 is at least partially, and perhaps wholly, responsible for performance gains in low-end and mid-tier servers. In addition, DDR4 may, at best, [...]

The evolution of LPDDR4

Ajay Jain, a director of product marketing at Rambus, recently told Semiconductor Engineering that LPDDR3 was the “workhorse” of the mobile memory market in 2014. According to Jain, LPDDR3 will retain its heavyweight status throughout [...]

On-chip Noise Monitor accelerates time-to-market for complex SOCs

Rambus has added an On-chip Noise Monitor to its suite of tools and IP cores. According to Loren Shalinsky, a Strategic Development Director at Rambus, the Noise Monitor is designed to accurately characterize power supply [...]

Xiaomi’s Mi Note Pro is loaded with 4GB of RAM

Announced earlier this month at CES 2015, the Asus Zenfone 2 features a 64-bit Intel Atom Z3580 processor and supports up to 4GB LPDDR3 DRAM. As we previously confirmed on Rambus Press, the Zenfone 2 [...]

Rambus to take center stage at DesignCon 2015


DesignCon 2015 kicks off January 27th in Santa Clara, California, where Rambus will be showcasing a wide range of R+ enhanced standard memory and serial IP core solutions. So be sure to stop by booth [...]