SerDes PHYs

>SerDes PHYs

Rambus at the Samsung Foundry Forum

In 2005, Samsung launched its Foundry business to provide leading-edge technology to the broader market. Based on accumulated technology leadership, Samsung successfully developed the foundry industry’s first 32nm High-k Metal Gate (HKMG) process in 2010, [...]

Understanding HBM design challenges

HBM2 @ 256GB/s As Semiconductor Engineering’s Ann Steffora Mutschler observes, high-bandwidth memory (HBM) enables lower power consumption per I/O, as well as higher bandwidth memory access with a more condensed form factor. This is accomplished [...]

Ensuring reliability in aging chips


Ed Sperling of Semiconductor Engineering recently published an article that takes an in-depth look at the concept of ensuring reliability in aging chips. As Sperling notes, reliability is becoming an increasingly important proof point for new [...]

Ramping 400 Gbps Ethernet and beyond

From 400 Gbps to 800 Gbps A recently published report by the Dell’Oro Group states that 400 Gbps is expected to comprise 20 percent of data center switching revenue by 2020. According to the research [...]

Fusing AI and semiconductors at CASPA 2018

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AI Trends and the Impact on Memory Systems Dr. Steven Woo, the Vice President of Systems and Solutions and Distinguished Inventor, Office of the CTO at Rambus, will be giving a keynote speech at the [...]

The future of NRZ and PAM4

Earlier this month, EDN’s Martin Rowe wrote an article that explores various industry viewpoints – shared at a DesignCon 2018 panel – about the future of NRZ (non-return-to-zero). According to Rowe, four-level pulse amplitude modulation (PAM4) [...]

Understanding the post Moore-Era data center

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Steven Woo, the vice president of systems and solutions and distinguished inventor in Rambus’ Office of the CTO, recently authored an article for Semiconductor Engineering that explores the data center in 2018 and beyond. As [...]

The importance of PCI Express 4.0 in the data center

Niraj Mathur, VP of high speed interface products at Rambus, recently penned an article for Semiconductor Engineering that explores the importance of PCI Express 4.0 in the data center. “Modern CPUs rely on the following primary [...]

Pre-verified chiplets gain traction as NRE costs rise


Pre-verified chiplets Ann Steffora Mutschler of Semiconductor Engineering recently penned an article that explores how the concept of building silicon from pre-verified chiplets is beginning to gain traction – as the semiconductor industry seeks to [...]

Rambus delivers high-speed SerDes solutions on GLOBALFOUNDRIES FX-14 ASIC platform

Rambus’ silicon-proven, high-speed SerDes solutions Rambus is now offering a suite of silicon-proven, high-speed SerDes solutions developed for the GLOBALFOUNDRIES high-performance FX-14™ ASIC platform. The suite includes 16G MPSL (multi-protocol serial link), 30G C2C (chip-to-chip) [...]

Living on the edge with 5G and fog computing

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From 4G to 5G The current 4G cellular networks that drive our computers, tablets and smartphones are poised for a major upgrade as we approach 5G. To understand where we’re going with 5G, we need [...]

Understanding peak power limitations in the data center

Semiconductor Engineering’s Anna Steffora Mutschler has written an article about how peak power poses a serious design challenge for chips, electronic systems and data centers. Issues related to peak power, says Mutschler, have become more [...]

Rambus highlights HBM2 PHY collaboration at GLOBALFOUNDRIES Technology Conference


HBM2 PHY We are showcasing our HBM2 PHY at the GLOBALFOUNDRIES Technology Conference at the Hyatt Regency Santa Clara (table #6). Designed for systems that require low latency and high bandwidth memory, our HBM2 PHY [...]

The challenges of IP reuse

Semiconductor Engineering’s Ed Sperling recently penned an article about the challenges of IP reuse. The basic business proposition for third-party IP, says Sperling, is that it’s cheaper, faster and less problematic to buy rather than [...]

5G connections to hit 1.4 billion by 2025

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Juniper Research analysts are forecasting 1.4 billion 5G connections by 2025, an increase from  just 1 million – upon commercial launch of 5th generation wireless systems – in 2019. Unsurprisingly, the U.S. alone is expected [...]

Wireless VR to strain data networks

Juniper Research analysts forecast that wireless VR headsets (smartphone-based and standalone) data consumption will increase by over 650% over the next 4 years, from nearly 2,800PB (Petabytes) in 2017 to over 21,000PB in 2021. Moreover, [...]

Semiconductor industry eyes SoC/ASIC disaggregation

Mohit Gupta, a senior director of product marketing for Rambus' Memory and Interfaces Division, has penned an article for Semiconductor Engineering about the growing industry interest in SoC/ASIC disaggregation. As Gupta notes, petabytes of data are [...]

Rambus showcases 56G Multi-Protocol SerDes (MPS) PHY at the Samsung Foundry Forum

Rambus is attending the Samsung Foundry Forum at the Santa Clara Marriott on May 24th. The company will be showcasing its 56G SerDes PHY, which is being developed on Samsung’s 10nm LPP (Low-Power Plus) process technology. [...]

Understanding the SerDes – Terabit Ethernet connection

Mohit Gupta, senior director of product marketing for Rambus' Memory and Interfaces Division, recently penned an article for Semiconductor Engineering that explores the connection between SerDes and terabit Ethernet. According to Gupta, 400 Gigabit Ethernet (400GbE) and 200 [...]

Rambus, PLDA and Avery Design announce comprehensive PCIe 4.0 solution

Rambus is currently collaborating with PLDA and Avery Design Systems Inc. to offer a comprehensive, silicon-proven PCI Express (PCIe) 4.0 solution, with backward compatibility to PCIe 3.0 and 2.0. According to Bill Fuller, a senior director [...]

Rambus develops 56G SerDes PHY on Samsung’s 10nm LPP process

Rambus has confirmed that its recently launched 56G SerDes PHY will be developed on Samsung’s 10nm LPP (Low-Power Plus) process technology. According to Luc Seraphin, senior vice president and general manager of the Rambus Memory [...]

ZDNet highlights Rambus’ role in Samsung’s 14nm tapeout

ZDNet journalist Cho Mu-Hyun reports that Samsung has confirmed a successful network processor tape-out based on the company’s 14LPP (Low-Power Plus) process technology in close collaboration with eSilicon and Rambus. “[Samsung] used its 14 Low-Power [...]

SerDes signal integrity challenges at 28Gbps and beyond

Maintaining signal integrity has become increasingly difficult for SerDes designers at 28Gbps, 56Gbps and beyond. After nearly fifty years, NRZ technology continues to pose significant challenges as data rates approach 56Gbps and refreshed standards mandate [...]

Samsung and eSilicon tape out 14nm network processor with Rambus 28G SerDes solution

Samsung Electronics has announced a successful network processor tape-out based on the company’s 14LPP (Low-Power Plus) process technology in close collaboration with eSilicon and Rambus. The tape-out was made possible by Samsung’s cutting-edge foundry process [...]

The Rambus 56 Gbps multi-protocol SerDes PHY: A closer look

Last week, we announced the launch of our 56G Multi-protocol SerDes (MPS) PHY developed on second-gen FinFET (Fin Field Effect Transistor) process technology. With a scalable ADC-based (analog-to-digital converter) architecture, the 56G SerDes FinFET PHY [...]

Rambus announces 56G SerDes PHY on second-gen FinFET process technology

Rambus has announced a 56G Multi-protocol SerDes (MPS) PHY developed on second-gen FinFET (Fin Field Effect Transistor) process technology to meet the evolving demands of communications and data center applications. With a scalable ADC-based (analog-to-digital [...]

Rambus is at DesignCon 2017

The DesignCon 2017 expo kicks off on February 2nd in Santa Clara. We’re at booth #833, showcasing our comprehensive suite of Ethernet, PCIe and DDRn IP solutions to solve today’s most challenging data center and [...]

Saving power with HBM

Ed Sperling of Semiconductor Engineering notes that power has always been a “global concern” in the design process because it affects every part of a chip. Nevertheless, partitioning for power rather than functionality or performance has [...]

Microsoft catapults FPGAs to new heights


Karl Freund of Moore Insights and Strategy recently penned an article for Forbes about Microsoft’s extensive deployment of FPGA’s in the data center and beyond. As Freund notes, Microsoft currently uses field programmable gate arrays [...]

Rambus microsite goes live on The Next Platform

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A new microsite curated by Rambus is now live on The Next Platform. According to Kendra De Berti, Director, Solutions Marketing at Rambus, the microsite hosts a wide range of in-depth content on applications from [...]

Rambus acquires Snowbush IP for $32.5 million

Rambus has acquired the assets of Semtech's Snowbush IP for $32.5 million as well as additional payments based upon specific new product sales through the end of 2022. Snowbush IP, formerly part of Semtech's Systems [...]

Exploring 2.5D packaging and beyond


Frank Ferro, a Senior Director of Product Marketing at Rambus, recently participated in a Semiconductor Engineering roundtable discussion about 2.5D and advanced packaging. According to Ferro, 2.5D can succeed if customer demand overcomes the additional [...]

AMD extends Rambus patent license agreement

Rambus has extended its patent license with Advanced Micro Devices (AMD) for a third, five-year term. Under the terms of the agreement, AMD will continue to be licensed for its integrated circuit and circuit board [...]

Rambus is at DesignCon 2016

The DesignCon 2016 expo kicked off on January 20th in Santa Clara. Rambus was at booth #835, showcasing its R+™ enhanced standard serial link and memory IP core solutions, along with tools for server, mobile and [...]

Rambus launches R+ 28G Serial Link PHY on Samsung’s 14nm LPP process

Rambus has launched a 28Gbps multi-modal serial link PHY on Samsung's leading-edge 14nm Low Power Plus (LPP) process. According to Luc Seraphin, senior VP and GM of Rambus’ Memory and Interfaces division, the R+ 28G [...]

Rambus renews patent license agreement with Toshiba

Rambus has renewed its patent license agreement with Toshiba Corporation. As per the terms of the new three-year agreement, Toshiba will be licensing a wide range of technologies from Rambus to cover products that include [...]

Rambus joins MPEG LA’s DisplayPort patent pool

Rambus has confirmed its participation in MPEG LA’s DisplayPort patent pool, alongside founding licensors Hitachi Maxell, Philips, Sony and Lattice Semiconductor. By joining the pool, Rambus will be making part of its R+ Serial Link innovations [...]

Google wants 5 petabit switching

The Platform’s Timothy Prickett Morgan reports that Google is eyeing networking throughput capabilities of 5 petabits per second. However, as Google Fellow Amin Vahdat recently pointed out, the industry currently “underprovisions” networks because it doesn’t [...]

ARM and Rambus: A Common Denominator


Writing for 24/7 Wall St, analyst Chris Lange notes that both ARM and Rambus license their respective architecture and designs to industry processor and memory industry players. “Rambus operates as an international technology solutions company. [...]

Rambus celebrates 25 years of innovation

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Founded in 1990 by Mark Horowitz and Mike Farmwald, Rambus scientists and engineers have spent the past quarter of a century bringing invention to market. “Rambus has a rich, 25-year history of developing and licensing [...]

Rambus to take center stage at DesignCon 2015


DesignCon 2015 kicks off January 27th in Santa Clara, California, where Rambus will be showcasing a wide range of R+ enhanced standard memory and serial IP core solutions. So be sure to stop by booth [...]

Shrinking nanometers with Rambus and Globalfoundries

Globalfoundries – which operates a total of 8 semiconductor fabrication facilities across the globe – has a long history of collaborating with Rambus on a wide variety of projects. In 2011, the two industry heavyweights [...]