ddr4

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Understanding HBM design challenges

HBM2 @ 256GB/s As Semiconductor Engineering’s Ann Steffora Mutschler observes, high-bandwidth memory (HBM) enables lower power consumption per I/O, as well as higher bandwidth memory access with a more condensed form factor. This is accomplished [...]

Designing automotive memory

Semiconductor Engineering’s Ann Steffora Mutschler recently penned an article about memory design. As Mutschler notes, memory design considerations are impacted by a range of factors, including cost, power, bandwidth and latency. “When it comes to [...]

Data buffering gains ground across multiple verticals

Earlier this month, Semiconductor Engineering’s Ann Steffora Mutschler penned an article that takes a closer look at how buffering is gaining ground as a way to speed up the processing of increasingly large quantities of data. In simple [...]

Going beyond GPUs with GDDR6

The origins of GDDR The origins of modern graphics double data rate (GDDR) memory can be traced back to GDDR3 SDRAM. Designed by ATI Technologies, GDDR3 made its first appearance in nVidia's GeForce FX 5700 [...]

The importance of PCI Express 4.0 in the data center

Niraj Mathur, VP of high speed interface products at Rambus, recently penned an article for Semiconductor Engineering that explores the importance of PCI Express 4.0 in the data center. “Modern CPUs rely on the following primary [...]

Cryogenics and accelerators push DRAM limits

Last month, Semiconductor Engineering’s Kevin Fogarty wrote an article that explores how major industry players are pushing the limits of DRAM. As Fogarty observes, the access bandwidth of DRAM-based computer memory has improved by a [...]

Next-gen server DIMM buffer chipset targets DDR5 memory

Rambus has announced functional silicon of a double data rate (DDR) server DIMM (dual inline memory module) buffer chipset prototype targeted for next-gen DDR5 memory technology. According to Luc Seraphin, senior vice president and general [...]

5G connections to hit 1.4 billion by 2025

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Juniper Research analysts are forecasting 1.4 billion 5G connections by 2025, an increase from  just 1 million – upon commercial launch of 5th generation wireless systems – in 2019. Unsurprisingly, the U.S. alone is expected [...]

Bolstering bandwidth and capacity with new memory tech

Rambus’ John Eble and Frank Ferro recently penned an article for Data Center Dynamics that explores how new memory technology can help bolster both bandwidth and capacity in the data center. As the two note, [...]

Building a robust HBM2 PHY

What is HBM? HBM is a high-performance memory that features reduced power consumption and a small form factor. More specifically, it combines 2.5D packaging with a wider interface at a lower clock speed (as compared [...]

The Rambus HBM GEN2 PHY: A closer look

Earlier this week, Rambus announced the availability of its new High Bandwidth Memory (HBM) Gen2 PHY. Designed for systems that require low latency and high bandwidth memory, the Rambus HBM PHY, built on the GLOBALFOUNDRIES [...]

Optimizing data centers with DDR4 buffer chips

DDR4 memory delivers up to 1.5x performance improvement over DDR3, running at 2.4Gbps- 3.2 Gbps, while reducing power by 25% on the memory interface. However, the shift to higher speeds degrades electrical signal integrity, especially [...]

Rambus microsite goes live on The Next Platform

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A new microsite curated by Rambus is now live on The Next Platform. According to Kendra De Berti, Director, Solutions Marketing at Rambus, the microsite hosts a wide range of in-depth content on applications from [...]

Intel says DDR4 is ramping quickly

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Last week at IDF 2016, Intel executive Geof Findley presented a comprehensive overview of the memory industry ecosystem. According to Findley, DDR4 is ramping quickly and should hit 31% of shipments during the second quarter [...]

ChipEstimate and Rambus look beyond DDR4

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Frank Ferro, a senior director of product management at Rambus, has penned an article for ChipEstimate about the future of DRAM in the age of the IoT. According to Ferro, the semiconductor industry has traditionally relied [...]

EE Times takes a closer look at Rambus’ 14nm R+ DDR4 PHY

Gary Hilson of the EE Times has covered Rambus’ recent announcement about the development of its R+ DDR4 PHY on GLOBALFOUNDRIES 14nm LPP process. As the journalist notes, the silicon is the first production-ready 3200 [...]

Rambus to acquire Inphi’s memory interconnect business

Rambus has signed a definitive agreement to purchase Inphi’s Memory Interconnect Business for $90M in cash. The acquisition includes all assets of the Inphi Memory Interconnect Business including product inventory, customer contracts, supply chain agreements [...]

Architecting new memory for the IoT

The once indefatigable Moore’s Law is beginning to slow, even as data, driven by a burgeoning Internet of Things (IoT), continues to increase exponentially. Consequently, a slew of new memory architectures, including those utilizing 2.5D [...]

The 3MB of RAM in William Gibson’s Neuromancer

Neuromancer, a 1984 cyberpunk novel by William Gibson, was the first winner of the science fiction triple crown: the Nebula Award, the Philip K. Dick Award and the Hugo Award. Marking the beginning of the [...]

Moore’s Law: From 16 kB to 16GB

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James Sanders of TechRepublic has confirmed that 16 GB SO-DIMM modules are now starting to become generally available from multiple vendors. “[This] eases RAM constraints in devices that have a limited number of slots for [...]

Memory price dip to spur DDR4 adoption

KitGuru’s Anton Shilov reports that DDR4 prices have dropped approximately 25% since late June. “According to DRAMeXchange, the world’s leading computer memory tracker, one 4Gb DDR4 chip rated to run at 2133MHz cost $3.618 on [...]

Building bridges with DRAM vendors

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Analysts at IHS Electronics say Rambus’ change in strategy from intellectual property (IP) licensing house to chipmaker has been “well received” by its customers. “Rambus has announced recently that it would begin developing server memory [...]

Navigating the DDR4 adoption road map

The projected adoption rate of DDR4 as the dominant industry memory standard was a major topic of discussion at Intel’s Developer Forum earlier this month, with the company confirming DDR4-2400 support for its upcoming Xeon [...]

Future challenges for DDR4 and beyond

Ely Tsern, VP and chief technologist for the Rambus Memory and Interfaces division, has identified five key trends driving future server memory. These include Big Data, additional cores per CPU, a DRAM scaling slowdown, the [...]

TECHnalysis Research talks Rambus server memory chipsets

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Bob O’Donnel of TECHnalysis Research recently published a white paper describing the critical role memory server chipsets play in facilitating high-speed DDR4 designs. “With the introduction of DDR4, server system designers can leverage DRAM that runs [...]

Ely Tsern talks memory interface chipsets with The Platform

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Ely Tsern, VP and chief technologist for the Rambus Memory and Interfaces division, recently sat down with Nicole Hemsoth of The Platform to discuss the launch of the company’s server memory interface chipset. “Memory today, [...]

EETimes: Rambus entering the fabless chip business

Junko Yoshida, Chief International Correspondent at UBM Electronics, says Rambus is entering the fabless chip business with the launch of its server memory interface chipset. “Rambus, which started its business 25 years ago as a [...]

Server market growth tied to increased memory demand

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Loren Shalinsky, a Strategic Development Director at Rambus, recently penned an article for Semiconductor Engineering that explores how server market growth has prompted a salient increase in memory demand. “A high-end server can have 48 or [...]

PC World packs 128GB of DDR4 – into a single PC

PC World executive editor Gordon Mah Ung recently announced that his team successfully “smashed right through” the traditional 64GB system RAM barrier. “[The] barrier has vexed consumer computing for years now. Mainstream desktop PCs have [...]

Increasing crop yields with Big Data

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The Farmers Business Network (FBN) is currently working on an initiative to break down agricultural data on millions of acres of U.S. farmland – while providing real-world results on the performance of various seed and [...]

Report: Intel Skylake Xeons could feature 28 cores, 6 memory channels

ExtremeTech’s Joe Hruska recently analyzed a set of leaked slides that suggest Intel’s plans for its upcoming Xeon cores may “stretch farther into the stratosphere” than originally predicted. “[The] new data purports to show Intel’s [...]

Report: Intel’s Skylake-S is primed for DDR4

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Writing for KitGuru, Anton Shilov says Intel’s upcoming Skylake-S architecture will promote DDR4 “considerably more aggressively” than initially believed. “Although [the] integrated memory controller of Skylake supports different types of DRAM, the processors will not [...]

Navigating Big Data analytics

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Intel VP and General Manager Ron Kasabian recently described the extraction of meaningful information from raw data as a “key enabler” of the new digital service economy. “In this new era, an organization’s competitive edge [...]

PayPal deploys ARM-based X-Gene servers

Applied Micro CEO and president Paramesh Gopi recently confirmed that PayPal has “deployed and validated” the ARM-powered X-Gene server-on-a-chip. According to Gopi, Paypal represents one of the many hyperscale data center customers the company is [...]

GeIL’s Super Luce is DDR4 eye candy

GeIL has announced its slick DDR4 Super Luce lineup. Boasting colors of white, red or blue, the kits are expected to range from DDR4-2666 MHz to DDR4-3400 MHz and up to 64GB capacity. “The principle [...]

AnandTech analyzes DDR4 and beyond

Writing for AnandTech, Ian Cutress recently explained why DDR4 was first launched in the enthusiast space. “On the server side, any opportunity to use lower power and drive cooling costs down is a positive, so [...]

R+ DDR4/3 PHY developed on Samsung’s 28nm LPP process

Rambus has officially confirmed that its R+™ DDR4/3 PHY was developed using Samsung’s 28nm LPP process. “Our ongoing collaboration with Samsung has yielded a robust, production-ready R+ DDR4/3 PHY on the power-performance optimized 28nm Low [...]

DDR4 deployment averts “thermal nightmare”

Writing for DataCenter Dynamics, Scott Fulton notes that recent benchmark results indicate DDR4 is at least partially, and perhaps wholly, responsible for performance gains in low-end and mid-tier servers. In addition, DDR4 may, at best, [...]

Doubling DRAM performance with conventional memory

Writing for SemiconductorEngineering, Ed Sperling reports that long-awaited DDR4 rollouts have begun. Indeed, a slew of consumer-centric motherboards packing Intel’s X99 chipset and DDR4 memory were reviewed by AnandTech’s Ian Cutress in late September. In addition, [...]

Intel’s X99 chipset accelerates DDR4 adoption

In September, a number of industry heavyweights introduced a range of servers powered by Intel’s recently launched 18-core Xeon E5-2600 v3 (Grantley) chip. The servers – debuted by Hewlett-Packard, Dell, Lenovo and IBM – are [...]

Grantley-powered Xeon servers pack DDR4 memory

A number of new servers powered by Intel’s recently launched 18-core Xeon E5-2600 v3 (Grantley) chip were announced at IDF 2014. AsIDG’s Agam Shah notes, the servers, debuted by Hewlett-Packard, Dell, Lenovo and IBM, are [...]

PHY interoperability highlights industry collaboration

Northwest Logic – a provider of high quality IP cores – is a member of Rambus’ rapidly expanding Partner Program. Recently, the two companies successfully validated interoperability of the Rambus R+™ DDR4/3 PHY with Northwest’s [...]