high-bandwidth memory

>high-bandwidth memory

Keeping up with Ethernet

Gary Hilson of the EE Times has written a detailed article about Rambus’ 56G SerDes PHY. As Hilson notes, the analog-to-digital converter (ADC) and (DSP) architecture of Rambus’ 56G SerDes PHY is designed meet the [...]

The rise of high bandwidth memory (HBM)

Semiconductor Engineering’s Ann Steffora Mutschler recently penned an article about high bandwidth memory (HBM). As Mutschler observes, the latest iteration of HBM continues its rise as a viable contender in the memory space. Indeed, HBM [...]

Rambus launches High Bandwidth Memory PHY on GLOBALFOUNDRIES 14nm LPP

Rambus has announced the availability of its High Bandwidth Memory (HBM) Gen2 PHY developed for the GLOBALFOUNDRIES FX-14TM ASIC Platform. Designed for systems that require low latency and high bandwidth memory, the Rambus HBM PHY, built [...]

Exploring 2.5D packaging and beyond

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Frank Ferro, a Senior Director of Product Marketing at Rambus, recently participated in a Semiconductor Engineering roundtable discussion about 2.5D and advanced packaging. According to Ferro, 2.5D can succeed if customer demand overcomes the additional [...]

Architecting new memory for the IoT

The once indefatigable Moore’s Law is beginning to slow, even as data, driven by a burgeoning Internet of Things (IoT), continues to increase exponentially. Consequently, a slew of new memory architectures, including those utilizing 2.5D [...]

The evolution of LPDDR4

Ajay Jain, a director of product marketing at Rambus, recently told Semiconductor Engineering that LPDDR3 was the “workhorse” of the mobile memory market in 2014. According to Jain, LPDDR3 will retain its heavyweight status throughout [...]