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Scaling DRAM Technology to Meet Future Demands: Challenges and Opportunities Sunday, June 22, 2025, Tokyo, Japan Half-Day tutorial held in conjunction with ISCA 2025 Tutorial Abstract Since the invention of the 1T1C bit cell more than 50 years ago, DRAMs have become the main memory of choice for processors in computer systems and many consumer electronics […]
On this episode of Ask the Experts, we had the opportunity to chat with Steven Woo, Rambus Fellow & Distinguished Inventor, about the latest developments in AI and the implications for hardware and computing architecture. Specifically, he discussed the exciting new inference technique called chain-of-thought and the innovations needed to support its computational demands. […]
CryptoManager RT-7xx Embedded HSM Family Quantum Safe, ISO 21434 Automotive-grade Programmable Hardware Security Contact Us The automotive-grade CryptoManager RT-7xx v3 Root of Trust family from Rambus is the next generation of fully programmable ISO 26262 and ISO 21434 compliant hardware security modules offering Quantum Safe security by design for secure automotive applications. Device and system […]
CryptoManager RT-6xx Root of Trust Family Quantum Safe, Programmable Hardware Security Contact Us The CryptoManager RT-6xx v3 Root of Trust family from Rambus is the latest generation of fully programmable FIPS 140-3 compliant hardware security cores offering Quantum Safe security by design for data center and other highly secure applications. Device and system architects face […]
By Bart Stevens, Senior Director of Product Marketing at Rambus The cybersecurity threat landscape is dynamic and rapidly evolving. Indeed, attackers are constantly finding new ways to exploit critical vulnerabilities across a wide range of applications and devices. Protecting data and devices requires secure processes running on systems and networks. A Root of Trust is […]
Rambus @ DesignCon 2025 Join Rambus for a day of technical sessions at DesignCon on January 29, 2025. Hear from our experts on the technologies that are set to shape the future of data centers and high-performance systems, and discover how our cutting-edge memory, interconnect and security IP enables today’s most challenging computing, edge, automotive […]
The disruption of GenAI over the last few years has forced system architects and hardware designers to rethink data center topologies. While AI model sizes and compute capability are growing exponentially, I/O throughput and memory access are growing linearly. These trends create an unsustainable gap, and it needs to be addressed across the stack starting […]
Security IP Glossary A glossary of Security IP terminology and relevant solutions. a | b | c | d | e | f | g | h | i | j | k | l | m | n | o | p | q | r | s | t | u | v | […]
John Eble, Vice President of Product Marketing for Memory Interface Chips at Rambus, recently shared the latest developments on the MRDIMM (Multiplexed Rank DIMM) DDR5 memory module architecture. This cutting-edge technology brings significant advances to memory bandwidth and capacity to support compute-intensive workloads including generative AI. What is MRDIMM? MRDIMM builds upon the existing DDR5 […]
In our latest episode of Ask the Experts, Sharad Chole, Co-founder and Chief Scientist at Expedera, shares his insights on the challenges and opportunities of deploying AI inference workloads at the edge. Key topics include: The exponential growth in AI model complexity Overcoming challenges in edge AI: memory and bandwidth The road ahead for AI […]