Home > Search
Found 296 Results
Today (Nov. 14th, 2023) the CXL™ Consortium announced the continued evolution of the Compute Express Link™ standard with the release of the 3.1 specification. CXL 3.1, backward compatible with all previous generations, improves fabric manageability, further optimizes resource utilization, enables trusted compute environments, extends memory sharing and pooling to avoid stranded memory, and facilitates memory […]
By Steven Woo, Rambus Fellow Last week, I had the pleasure of hosting a panel at the AI Hardware & Edge AI Summit on the topic of “Memory Challenges for Next-Generation AI/ML Computing.” I was joined by David Kanter of MLCommons, Brett Dodds of Microsoft, and Nuwan Jayasena of AMD, three accomplished experts that brought […]
PCI Express (PCIe) Controller IP Delivering high-bandwidth interconnect performance Contact Us PCI Express Controller IP Rambus silicon-proven, high-performance PCI Express® (PCIe®) 7.0, 6.1, 5.0, 4.0 and earlier generation digital controllers are optimized for use in SoCs, ASICs and FPGAs. These market-leading solutions for high-performance interfaces address AI/ML, data center and edge applications. Explore ProductsPCIe ControllerPCIe […]
We’re just back from MemCon, the industry’s first conference entirely devoted to all things memory. Running over the course of two days, the conference brought together attendees from across the memory ecosystem. We caught up with Mark Orthodoxou, VP Strategic Marketing for CXL Processing Solutions at Rambus and MemCon keynote speaker. Why is memory so […]
We had such a great response to last week’s More CXL Webinar Q&A blog that we decided to reprise the questions answered live in our webinar How CXL Technology will Revolutionize the Data Center (available on-demand). Hope this provides more insights on the capabilities of Compute Express Link™ (CXL™) technology. Click on a link below […]
The fifth annual AI Hardware Summit was back this month, and for the first time in a couple of years, it took place fully in-person in Santa Clara, California. The world’s leading experts in AI hardware came together over the course of three days to discuss some of the big challenges facing the industry, and […]
The CXL™ Consortium (of which Rambus is a member) has now released the 3.0 specification of the Compute Express Link™ (CXL) standard. CXL 3.0 introduces compelling new features that promise to increase data center performance, scalability and TCO. CXL has evolved rapidly from its introduction in 2019. The 1.0/1.1 specification enabled prototyping of CXL solutions. […]
Rambus Fellow, Steven Woo, returns to the Rambus Design Summit stage tomorrow, and we are so excited for his keynote: Advancing Computing in the Accelerator Age! In our last interview before the show, we met with Steven to chat about his background, CXL, and some of the biggest challenges for computing in the years ahead. Read […]
We’re so excited that Ann Keffer, Product Marketing Manager at Siemens EDA, will be joining us on the (virtual) stage at Rambus Design Summit! Ahead of the show, we talked to Ann about autonomous driving, what she loves to do in her free time, and growth drivers for the Siemens EDA business. Read on for […]
PCIe 6.0 Retimer Controller with CXL Support Contact Us PCI Express® (PCIe®) 6.0 links operating at 64 GT/s using PAM4 signaling have a reach of up to 13 inches at nominal conditions on standard PCBs. Extending trace routing beyond this distance results in higher first bit error rates (FBER) and reduced link efficiency due to […]