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Written by Steven Woo for Rambus Press In part 5 of this series, we discussed the most common memory systems that are used in the highest performance AI applications. These include on-chip memory, high bandwidth memory (HBM) and Graphics DDR SDRAM (GDDR SDRAM). In this blog post, we’ll take an in-depth look at on-chip memory, […]
PCIe 4.0 Controller Contact Us The PCIe 4.0 Controller (formerly XpressRICH) is designed to achieve maximum PCI Express® (PCIe®) 4.0 performance with great design flexibility and ease of integration. It is fully backward compatible with PCIe 3.1/3.0. A PCIe 4.0 Controller with AXI (formerly XpressRICH-AXI) is also available. The controller delivers high-bandwidth and low-latency connectivity for […]
Protocol-IP-197 Multi-Protocol Engine with Classifier, Inline and Look-Aside, 10-100 Gbps Contact Us The Protocol-IP-197 Multi-Protocol Engine is an IP family for accelerating IPSec, SSL, TLS, DTLS (CAPWAP), 3GPP and MACsec up to 5, 10, 20, 40, 50 and 100 Gbps in multi-core server, communication or network processors offering a large selection of cipher algorithms. Designed for fast […]
Protocol-IP-196 Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps Contact Us The Protocol-IP-196 Multi-Protocol Engine is a protocol-aware packet engine for accelerating IPSec, SSL/TLS, DTLS, 3GPP and MACsec up to 10 Gbps in multi-core application or communication processors offering a large selection of cipher algorithms. Designed for fast integration, maximum CPU offload and offering full transforms, it […]
PCIe 5.0 Controller Contact Us The Rambus PCIe 5.0 Controller (formerly XpressRICH from PLDA) is designed to achieve maximum PCI Express® (PCIe®) 5.0 performance with great design flexibility and ease of integration. It is fully backward compatible with PCIe 4.0 and 3.1/3.0. A PCIe 5.0 Controller with AXI (formerly XpressRICH-AXI) is also available. The controller […]
Rambus fellow Helena Handschuh recently participated in a Semiconductor Engineering industry panel discussion about securing data running on AI/ML silicon. As the panel participants note, AI systems are designed to process data at high speeds, not limit access. This is precisely why the semiconductor industry is struggling to more effectively secure AI/ML data and prevent […]
Highlights: Digital controller IP complements existing portfolio of high-speed interface PHYs Expands solutions for automotive, data center, artificial intelligence (AI), machine learning (ML) and communications applications Combined offerings, including HBM2, GDDR6, DDR4 and PCI Express (PCIe), create one-stop-shop for SoC designers SUNNYVALE, Calif. – Aug. 27, 2019 – Rambus Inc. (NASDAQ: RMBS), a premier silicon […]
Steven Woo, Rambus fellow and distinguished inventor, recently spoke with Ed Sperling of Semiconductor Engineering about designing systems with GDDR6 and HBM2. As Woo emphasizes, understanding engineering tradeoffs are an important part of deciding how to best match a system with the most appropriate memory. Read first our primer on: HBM2E Implementation & Selection – […]
Nicole Wetsman of The Verge recently penned an in-depth article about the many security issues plaguing the global health care sector. Protecting medical devices is not an easy job. As Wetsman observes, most hospitals and physicians are unprepared to counter critical cybersecurity threats, even though they pose a clear and present danger to public health. […]
Highlights: Complementary product portfolio of PHYs and controllers further accelerates Rambus growth Expands solutions for data center, artificial intelligence (AI), machine learning (ML), communications and automotive applications Combined offerings, including HBM2, GDDR6, DDR4 and PCI Express (PCIe), create one-stop-shop for SoC designers SUNNYVALE, Calif. and HILLSBORO, Ore. – July 29, 2019 – Rambus Inc. (NASDAQ: […]