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Part 2: DRAM goes cryogenic

https://www.rambus.com/blogs/part-2-dram-goes-cryogenic/

In part one of this series, Rambus Chief Scientist Craig Hampel told Semiconductor Engineering’s Ed Sperling that cryogenic DRAM (below minus−180 °C or 93.15 kelvin) offers numerous power and performance advantages. These include increased transistor performance, the elimination of leakage, wires that super conduct, the ability of DRAM to operate as a non-volatile device and […]

Understanding the SerDes – Terabit Ethernet connection

https://www.rambus.com/blogs/understanding-the-serdes-terabit-ethernet-connection/

Mohit Gupta, senior director of product marketing for Rambus’ Memory and Interfaces Division, recently penned an article for Semiconductor Engineering that explores the connection between SerDes and terabit Ethernet. According to Gupta, 400 Gigabit Ethernet (400GbE) and 200 Gigabit Ethernet (200GbE) are currently slated for official release by the IEEE P802.3cd Task Force in December 2017. “Although there is not […]

Understanding the role of buffer chips in the evolving data center

https://www.rambus.com/blogs/understanding-the-role-of-buffer-chips-in-the-evolving-data-center/

Rambus VP of Systems and Solutions Steven Woo recently penned an article for ChipEstimate about the changing data center. According to Woo, the evolution of computing from the PC-centric world of the 1980’s-1990’s to today’s mobile+cloud environment has been a primary driver for change in processors, memory, storage and networks. Clock speeds and the breakdown […]

EE Times highlights Rambus’ cryogenic computing research

https://www.rambus.com/blogs/ee-times-highlights-rambus-cryogenic-computing-research/

Junko Yoshida of the EE Times reports that Rambus, in collaboration with Microsoft, will have an early prototype of cryogenic memory in a month – and a more complete prototype by the end of the year. The new technology is expected to be “essential” to data centers, which are currently the fastest growing consumer of […]

FPGAs are shaping the computing platforms of the future

https://www.rambus.com/blogs/fpgas-are-shaping-the-computing-platforms-of-the-future-2/

Steven Woo, VP of Systems and Solutions at Rambus, recently penned an article for Semiconductor Engineering about how FPGAs are helping to shape the computing platforms of the future. As Woo notes, Moore’s Law, which helped fuel a relentless progression in computing performance, has been an important semiconductor industry mainstay for decades. However, Moore’s Law […]

Looking beyond Dennard Scaling

http://www.rambusblog.com/2016/11/03/looking-beyond-dennard-scaling/#new_tab

Robert H. Dennard co-authored his now-famous paper for the IEEE Journal of Solid State Circuits way back in 1974. Essentially, Dennard and his engineering colleagues observed that as transistors are reduced in size, their power density stays constant. Meaning, power use stays in proportion with area, as both voltage and current scale (downward) with length.

Looking beyond Dennard Scaling

https://www.rambus.com/blogs/looking-beyond-dennard-scaling-2/

Robert H. Dennard co-authored his now-famous paper for the IEEE Journal of Solid State Circuits way back in 1974. Essentially, Dennard and his engineering colleagues observed that as transistors are reduced in size, their power density stays constant. Meaning, power use stays in proportion with area, as both voltage and current scale (downward) with length. […]

Maximizing Von Neumann architecture

https://www.rambus.com/blogs/maximizing-von-neumann-architecture-2/

In 1945, mathematician and physicist John von Neumann described a design architecture for an electronic digital computer in the First Draft of a Report on the EDVAC. Also known as the Princeton architecture, the design included a processing unit with an arithmetic logic unit and processor registers; a control unit containing an instruction register and […]

The role of FPGA acceleration in the data center and beyond

https://www.rambus.com/blogs/the-role-of-fpga-acceleration-in-the-data-center-and-beyond-2/

The International Conference on Field-Programmable Logic and Applications recently convened in Lausanne, Switzerland. As Christoforos Kachris, a senior researcher at the National Technical University of Athens notes, exploring the role of FPGAs in the data center took center stage at the conference. “Christoph Hagleitne presented IBM’s view of the major applications where FPGAs can provide […]

Rethinking system architecture as Moore’s Law wanes

https://www.rambus.com/blogs/rethinking-system-architecture-as-moores-law-wanes-2/

Ed Sperling of Semiconductor Engineering observes that chipmakers are increasingly relying on architectural and micro-architectural changes as the “best hope” for optimizing power and performance across markets, process nodes and price points. “While discussion about the death of Moore’s Law predates the 1-micron process node, there is no question that it is getting harder for even […]

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