Found 221 Results

PCIe 7.0 Switch

https://www.rambus.com/interface-ip/pci-express/pcie7-switch/

PCIe 7.0 Switch Contact Us The Rambus PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enables the connection of one upstream port and multiple downstream ports as a fully configurable interface subsystem. It is backward compatible to PCIe 5.0. ContactProduct Brief How the […]

PCIe 7.0 Retimer Controller with CXL Support

https://www.rambus.com/interface-ip/pci-express/pcie7-retimer-controller/

PCIe 7.0 Retimer Controller with CXL Support Contact Us PCI Express® (PCIe®) 7.0 links operating at 128 GT/s using PAM4 signaling have a reach of up to 13 inches at nominal conditions on standard PCBs. Extending trace routing beyond this distance results in higher first bit error rates (FBER) and reduced link efficiency due to […]

PCIe 7.0 Controller

https://www.rambus.com/interface-ip/pci-express/pcie7-controller/

PCIe 7.0 Controller Contact Us The Rambus PCI Express® (PCIe®) 7.0 Controller is a configurable and scalable design for ASIC implementations. Optimized for high-bandwidth efficiency at data rates up to 128 GT/s, the controller delivers maximum performance for Data Center, Edge, AI/ML and HPC applications. It is backward compatible to the PCIe 6.0 and 5.0, […]

GDDR7 Controller

https://www.rambus.com/interface-ip/gddr/gddr7-controller/

GDDR7 Controller Contact Us The Rambus GDDR7 controller IP core is designed for use in applications requiring high memory throughput including artificial intelligence/machine learning (AI/ML), graphics, high-performance computing (HPC). It supports 160 Gigabytes per second (GB/s) throughput for a GDDR7 memory device enabling next-level performance for AI accelerators and GPUs using GDDR7 memory. Secure Site […]

CXL 3.0 Controller

https://www.rambus.com/interface-ip/cxl/cxl3-controller/

CXL 3.1 Controller Contact Us The Rambus Compute Express Link® (CXL®) 3.1 Controller is a parameterizable design for ASIC and FPGA implementations. It leverages the Rambus PCIe 6.1 Controller architecture for the CXL.io protocol and adds the CXL.cache and CXL.mem protocols specific to CXL. The controller exposes a native Tx/Rx user interface for CXL.io traffic […]

HBM3E Controller

https://www.rambus.com/interface-ip/hbm/hbm3-controller/

HBM3E / HBM3 Controller IP Contact Us The Rambus HBM3E / HBM3 controller cores are designed for use in applications requiring high memory bandwidth and low latency including AI/ML, HPC, advanced data center workloads and graphics. Secure Site Login ContactProduct Brief The HBM3E Memory Subsystem HBM3E is a high-performance memory that features reduced power consumption […]

PCI Express 5 vs. 4: What’s New? [Everything You Need to Know]

https://www.rambus.com/blogs/pci-express-5-vs-4/

Introduction What’s new about PCI Express 5 (PCIe 5)? The latest PCI Express standard, PCIe 5, represents a doubling of speed over the PCIe 4.0 specifications. We’re talking about 32 Gigatransfers per second (GT/s) vs. 16GT/s, with an aggregate x16 link duplex bandwidth of almost 128 Gigabytes per second (GB/s). This speed boost is needed […]

Rambus Safeguards Accelerated Computing with FPGA-targeted Security IP

https://www.rambus.com/rambus-safeguards-accelerated-computing-with-fpga-targeted-security-ip/

Highlights: Bring FPGAs with a state-of-the-art offering of security IP products Secures the broad range of FPGAs from high-performance accelerators to low-power, lightweight devices Supports FPGAs serving applications for the Data Center, Artificial Intelligence / Machine Learning, Edge, IoT, Defense, and more SAN JOSE, Calif. – Aug. 22, 2023 – Rambus Inc. (NASDAQ: RMBS), a premier chip and […]

Rambus DDR5 RCD Takes Performance to 6400 MT/s

https://www.rambus.com/blogs/rambus-ddr5-rcd-takes-performance-to-6400mts/

We have said it before, and we will say it again, you can never have enough memory bandwidth. Nowhere is this statement truer than in the data center where advanced workloads for high-performance computing (HPC) and artificial intelligence/machine learning (AI/ML) continue to demand unprecedented levels of bandwidth, and then some more. DDR5 memory is set […]

AI Hardware Summit Event Recap: Interview with Steven Woo

https://www.rambus.com/blogs/ai-hardware-summit-event-recap-interview-with-steven-woo/

The fifth annual AI Hardware Summit was back this month, and for the first time in a couple of years, it took place fully in-person in Santa Clara, California. The world’s leading experts in AI hardware came together over the course of three days to discuss some of the big challenges facing the industry, and […]

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