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Ben Levine, Senior Director of Product Marketing at Rambus, recently sat down with Sanjay Gangal of EDA Café to discuss IoT security and cryptography. According to Levine, security should be embedded in every chip. More specifically, says Levine, a separate hardware-based security core can help protect both the SoC itself and the system it powers. […]
Security High Speed Public Key Accelerator The Rambus High Speed Public Key Accelerator PKI-IP-154 (EIP-154 formerly the Inside Secure) is a family of cryptographic IP cores designed for full scalability and an optimal performance over gate count ratio. The PKA-IP-154 can be deployed in any semiconductor design that needs key exchange or key generation at […]
Targeting Intel’s DDIO White hat security researchers from Vrije Universiteit Amsterdam and ETH Zurich have unveiled a new exploit dubbed NetCAT. The exploit targets Direct Cache Access (DCA) – widely known as Data-Direct I/O (DDIO) – found in recent generations of Intel server processors. As a performance optimization feature, DDIO grants network devices and other […]
Side-channel attacks are low cost, non-invasive, and can completely subvert an electronic system’s security. Watch this webinar to learn more about the nature of side channel attacks and how testing can reveal a system’s ability to handle this threat.
All physical electronic systems routinely leak information about the internal process of computing via fluctuating levels of power consumption and electro-magnetic emissions. Much like traditional safecracking, an electronic side-channel attack (SCA) eschews a brute force approach to extracting keys and other secret information from a device or system. As such, an SCA conducted against electronic […]
Recently, Rambus blogged about a large number of our DPARC and Crypto Accelerator Hardware Cores receiving FIPS-140-2 CAVP certification by NIST. As we wrote, these certifications provide our customers with assurance of the robustness, quality and applicability of our cryptographic solutions. But, as nefarious parties continue to uncover new ways to hack devices, Rambus and […]
When Jann Horn of Google’s Project Zero posted a detailed blog titled “Reading privileged memory with a side-channel,” it set off a firestorm of activity as the post confirmed that secret information inside a computer could be accessed via two different attacks, Meltdown and Spectre. Essentially, both attacks utilize CPU data cache timing to efficiently […]
Ben Levine, Senior Director of Product Marketing at Rambus, recently sat down with Sanjay Gangal of EDA Café to discuss IoT security and cryptography. According to Levine, security should be embedded in every chip. More specifically, says Levine, a separate hardware-based security core can help protect both the SoC itself and the system it powers. […]
Security researcher Yifan Lu recently published a detailed paper that examines how voltage glitching causes critical timing violations in CMOS behavior. More specifically, Lu closely analyzes CMOS transistor behavior to better understand when the combinational logic is most susceptible to voltage glitch induced faults. The paper also describes a real-world fault injection attack against the […]
Crypto Accelerator IP Offload and accelerate cryptographic processing Contact Us Crypto Accelerator and Random Number Generator IP Rambus offers a broad portfolio of cryptographic accelerator IP cores for symmetric and asymmetric ciphers, Hash- and HMAC-based integrity algorithms, as well as true random number generators. Rambus also offers a broad portfolio of DPA and FIA protected […]