On Die Termination (ODT) Calibration

Summary

As the performance requirements of digital systems continue to increase, there is increasing requirements to deliver signal integrity that enables reliable operation at higher signaling rates.

Signal line terminations are useful elements in the management of signal integrity. Signal line terminations may be used external to the memory device or within the memory device itself. Incorporating a resistive termination within the DRAM device, which is often referred to as On Die Termination (ODT), improves the signaling environment by reducing the electrical discontinuities introduced with off-die termination.

Variations in the fabrication process as well as fluctuations in voltage and temperature result in variability in the resistive characteristics of the ODT elements. As a result, there is a need for calibration of the termination elements, where such calibration is performed on-chip.

Background

Conventional DRAM memory module architectures typically include line termination resistors on the motherboard, as illustrated in the following Figures. Although the termination resistors on the motherboard reduce some reflections on the signal lines, they are unable to prevent reflections resulting from the stub lines that connect to the DRAMs on the module. As can be seen in the figure below, a signal propagating from the memory controller to the DRAM encounters an impedance discontinuity at the stub leading to the DRAM on the module. The signal that propagates along the stub to the DRAM will be reflected back onto the signal line, thereby introducing unwanted noise into the signal. The introduced noise and the consequential signal degradations that are not addressed by such off-die termination become more pronounced with higher data rates and longer stub lengths. Larger, multi-drop systems containing multiple DRAM modules introduce even more reflections and consequently add more reflective noise, thereby resulting in further signal degradation.

By placing the termination resistance on the die itself rather than the motherboard, the reflections resulting from discontinuities in the line are significantly reduced, thus producing a cleaner signal and enabling faster data rates. The figure below illustrates an implementation of on die termination.

Rambus Solutions

ODT Calibration is a technique that involves calibrating the termination impedance in order to optimize the reduction of signal reflections. ODT Calibration allows an optimal termination value to be established that compensates for variations in process and operating conditions.

A calibrated ODT value significantly reduces unwanted signal reflections while only minimally attenuating the magnitude of the signal swing due to the added resistive loading. The resulting cleaner data signal allows for higher data rates.

The following schematic illustrates an example of how ODT Calibration may be achieved. The circuit shown is capable of establishing an ODT impedance that is proportional to an external precision resistor. The same external resistor can also be used for Output Driver Calibration.

The ODT Calibration controller, shown in the following illustration as ODT Control (0:8), compares the voltage drop across the ODT resistor network with a voltage drop across an external resistor represented in the Figure by Vext. The controller modifies the resistor network with coarse tuning and fine tuning to achieve an impedance value that closely approximates the external, reference resistance.

Where are the Benefits Realized?

ODT Calibration provides benefits to the following areas:

Device Benefits

Enhanced signal performance allows for higher data rates, thus enabling designers to achieve superior DRAM device and module performance.

Subsystem Benefits

Termination components placed on the DRAM device removes these elements from the PCB. By reducing the number of components and signal lines on the motherboard, the cost and complexity of the motherboard is reduced while achieving increased reliability.

System Benefits

Superior data rates and module performance are enabled through the improved signal integrity achieved by using calibrated ODT. Reduced power consumption and longer battery life on portable devices can also be achieved by only enabling the resistors when needed, thus reducing the amount of static current drawn by these terminations.