Rambus Blog
Post-Quantum Crypto and Rambus
Today’s encryption methods are generally broken down into two types: symmetric and asymmetric. Symmetric encryption relies on the sender and
Memory Systems for AI: Part 6
Written by Steven Woo for Rambus Press In part 5 of this series, we discussed the most common memory systems
Memory Systems for AI: Part 5
Written by Steven Woo for Rambus Press In part four of this series, we took a closer look at the
Memory Systems for AI: Part 4
Written by Steven Woo for Rambus Press In part three of this series, we discussed how a Roofline model can
Memory Systems for AI: Part 3
Written by Steven Woo for Rambus Press In part two of this series, we took a closer look at how
Complete Memory Interface Solution for HBM2E Launched
Rambus has announced a comprehensive interface solution for HBM2E memory consisting of co-verified PHY and memory controller. Operating at a
Memory Systems for AI: Part 2
In part one of this series, we discussed how the world’s digital data is growing exponentially, doubling approximately every two
Memory Systems for AI: Part 1
Written by Steven Woo for Rambus Press There has been quite a lot of recent news about domain-specific processors that
Cable Haunt vulnerability can give hackers remote access to approximately 200 million cable modems
Danish cybersecurity experts Alexander Krog, Jens Stærmose and Kasper Terndrup of cybersecurity firm Lyrebirds ApS, and independent Danish researcher Simon
PCI Express 5 vs. 4: What’s New? [Everything You Need to Know]
Introduction What’s new about PCI Express 5 (PCIe 5)? The latest PCI Express standard, PCIe 5, represents a doubling of
California’s IoT law is a good start, but more needs to be done
Written by Paul Karazuba, head of product, Rambus Security Passed by former California governor Jerry Brown, cybersecurity law SB-327 is
Plundervolt steals keys from cryptographic algorithms
An international team of white hat researchers has successfully corrupted the integrity of Intel Software Guard Extensions (SGX) on Intel
Shattering the neural network memory wall with Checkmate
A recent paper published on arXiv by a team of UC Berkeley researchers observes that neural networks are increasingly bottlenecked
Complete Interface Solution for PCIe 5.0 Launched
Rambus has announced a comprehensive interface solution for PCI Express 5 (PCIe 5.0) consisting of a new PCIe 5.0 PHY
That’s why I need Multiple Roots of Trust (+Examples)
Do multiple roots of trust offer the absolute security? Why do we need them after all? Let’s see. In this
Rambus’ Ben Levine talks IoT security and cryptography with EDA Café
Ben Levine, Senior Director of Product Marketing at Rambus, recently sat down with Sanjay Gangal of EDA Café to discuss
Optimizing Memory for AI Applications: Part 2
In part one of this two-part blog series, Steven Woo, Rambus fellow and distinguished inventor, spoke with Ed Sperling of
Optimizing Memory for AI Applications: Part 1
Steven Woo, Rambus fellow and distinguished inventor, recently spoke with Ed Sperling of Semiconductor Engineering about how certain number formats
Chiplets keep the scaling of integrated circuits (ICs) rolling
As data grows at an accelerating pace, more compute power and bandwidth are required to process this data, driving the
HBM2 or GDDR6?
Earlier this month, Semiconductor Engineering editor-in-chief Ed Sperling hosted an industry roundtable to discuss new DRAM options and considerations. Frank
NetCat Exploits Intel’s DDIO
Targeting Intel’s DDIO White hat security researchers from Vrije Universiteit Amsterdam and ETH Zurich have unveiled a new exploit dubbed