AI Requires Tailored DRAM Solutions
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Webinars
Check out our library of upcoming and on-demand webinars, and hear from our experts about topics ranging from high speed memory solutions, security IP, IoT and beyond.
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Join Rambus for a webinar exploring how Dynamic Random Access Memory (DRAM) is a key enabler for Artificial Intelligence (AI). of AI and how DRAM is evolving in response.
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The design of chip anti-tamper protection needs to adapt and scale with rising threats. Adversaries range from high school hackers to well-funded state actors. Given the threats, it’s useful to think about anti-tamper countermeasures as a hierarchy of safeguards that parallel the type, effort and expense of attacks.
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Join Neeraj Paliwal, vice president and general manager of the Rambus Security business, and William Wong, senior content director and technology editor for Electronic Design, as they discuss the security risks and solutions that emerge when 5G meets AI.
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As chip designers face greater requirements for security, they also have a growing number of options for secure silicon IP. This webinar will examine common certification regimes, their costs and benefits, and how this impacts the selection of security IP.
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Counterfeit chips are large and growing problem putting both civilian and military supply chains at risk. Estimates of the size of the counterfeit market run to $75B and more. With electronics at the heart of so many of the products we depend upon, the risks of counterfeit semiconductors range from inconvenience to loss.
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Dr. Steven Woo, fellow and distinguished inventor at Rambus, and William Wong, senior content director and technology editor for Electronic Design, examine the two predominant memory solutions for AI: GDDR6 and HBM2E. We’ll explore the tradeoffs and ideal application fit for training and inference implementations.
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For AI and HPC applications, HBM2E memory can deliver excellent bandwidth, capacity and latency in a very compact footprint thanks to its 2.5D/3D structure. The flipside is that this same structure leads to greater design complexity and raises a new set of implementation considerations.
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Accelerator hardware for AI and ML are increasingly prevalent in data centers and devices, however security threats can compromise these assets. Part 1 dives into the growing complexity of electronic systems and the security threats to AI/ML accelerators.
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Part 2 of this webinar series explains the basic concepts at the foundation of all security systems, and what security building blocks can be used to counter AI/ML accelerators.
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Part 3 of this webinar series dives into the challenges of implementing security in software and explores how threats to AI/ML accelerators be countered with a hardware Root of Trust.
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As chip designers face greater requirements for security, they also have a growing number of options for secure silicon IP. This webinar will examine common certification regimes, their costs and benefits, and how this impacts the selection of security IP.
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Neural networks are fueling growth in AI for a broad spectrum of applications. Learn about the memory architectures and their relative advantages.
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Fault injection is the art of manipulating hardware behavior through voltage spikes, electromagnetic transmissions or laser impulses. Join Rambus and our partners at Riscure for a webinar explaining fault injection attacks and their mitigation.
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This webinar will outline how the latest technology innovations enable GDDR6 to reach speeds where no memory has gone before, meeting the voracious demand for bandwidth of applications on the frontier of computing
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Neural networks are fueling growth in AI for a broad spectrum of applications. Learn about the memory architectures and their relative advantages.
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Watch this webinar to learn more about the nature of side-channel attacks and how testing can reveal a system’s ability to handle this threat.
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Watch this webinar to learn about some of the challenges of domain-specific silicon, as well as potential ways to support the continued progress of AI silicon.
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Learn about the technologies, including GDDR6, HBM, and high speed SerDes and memory buffers, that move, accelerate, and store the data that enable AI, IoT, and 5G.
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Part one of our series. Explore some of the threats facing SoC and processor designers and how can SoCs be architected for both performance and security.
Secure Silicon IP Webinar Series
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Part two of our series. What is a root of trust and how can it be implemented? Learn about the attributes of a hardware root of trust that provides strong security.
Secure Silicon IP Webinar Series
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Part three of our series. Learn how a secure co-processor with multiple roots of trust allow different applications to have their own “virtual” security core in the SoC, but each with a private security domain.
Secure Silicon IP Webinar Series
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Hear about features, benefits and availability of our HBM2 and GDDR6 solutions, and understand how meet the needs of high-performance applications, including machine learning, data mining, and networking.
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Join us as we look at how IoT security can be deployed efficiently and seamlessly from device to cloud without negatively impacting profitability or time to market.
