LPDDR5 Delivers High Bandwidth for a Growing Range of Applications
Initially designed for mobile phones and laptops, the bandwidth and low power characteristics of LPDDR make it an increasingly attractive choice of
Featured Webinar
How CXL Technology will Revolutionize the Data Center
November 2nd · 11am PT | 2pm ET
Webinars
Check out our library of upcoming and on-demand webinars, and hear from our experts about topics ranging from high speed memory solutions, security IP, IoT and beyond.
Accelerating Data Interconnects with PCI Express™ 6.0 & 5.0 Interface IP
The latest generation of the PCI Express, PCIe™ 6.0, advances performance to 64 GT/s in support of advanced workloads and networking. In
GDDR6 Memory Enables High-Performance Inferencing
A rapid rise in the size and sophistication of inferencing models has necessitated increasingly powerful hardware deployed at the network edge and
Implementing CXL™ 2.0 Interconnect Solutions
Compute Express Link™ (CXL) has evolved rapidly since its launch in 2019 and is slated for debut in the next generation of
Memory Bandwidth for AI/ML Races Higher with HBM3
With the insatiable need for higher bandwidth in state-of-the-art AI/ML training and HPC, the HBM standard has been on a rapid pace
Advancing Computing in the Accelerator Age
Moore’s Law has been the force that has shaped the modern world enabling chips with billions of transistors. Yet today, when we
Device Security Requires a Foundation in Hardware
[May 18 @ 8am PT] Join Neeraj Paliwal, general manager of the Rambus Security IP business, and Bill Wong, senior content director
Navigating the Intersection of Safety and Security
Vehicle systems and the semiconductors used within them are some of the most complex electronics seen today. Ensuring these systems are both
Protecting Devices with Security Anchored in Hardware
[April 14 @ 11am PT] Join Neeraj Paliwal, general manager of the Rambus Security IP business, and John McHale, EVP & Group
Secure Your Devices with PUF Plus Hardware Root of Trust
[Mar 30 @ 10am PT] Technology experts from Rambus and Intrinsic ID will discuss how combining PUF technology with a hardware Root
Memory Bandwidth Races Higher with HBM3
Join memory expert Frank Ferro for a live webinar as he discusses what changes come with the new generation of HBM, and
Protecting Government Systems: Addressing Growing CyberSecurity Threats With Hardware-Level Security
[Feb 22 @ 11am PT] In this webinar, Adelaide O’Brien, Research Director, Government Digital Transformation Strategies of IDC and Neeraj Paliwal, general
Stopping Stealthy Counterfeit Chips with PUF Helper-Data Images
PUFs, physically unclonable functions, are mixed-signal circuits which rely on variations unique to a specific chip in order to self-generate a digital
Bring on the Bandwidth with HBM3 Memory
Join memory interface technology expert Frank Ferro as he discusses the capabilities of, and design considerations for, the upcoming 3rd- generation of
CXL and IDE: Important Considerations of Protecting High Speed Interconnects
Hear Rambus and Siemens discuss the background of IDE, the threat models it addresses, and how zero latency IDE’s can provide assurances