HBM Controller IP

Delivering ultra high-bandwidth, low-latency memory performance

HBM Memory Controller IP

Rambus High-Bandwidth Memory (HBM) 3.0 and 2E/2 controller IP provide high-bandwidth, low-latency memory performance for AI/ML, graphics and HPC applications. 

VersionMaximum Data Rate (Gb/s)Controller
HBM39.6Download HBM3 Product Brief Product Brief
HBM2E/23.6/2.0Download HBM3 Product Brief Product Brief

HBM3 & HBM2E Controller IP

Product Brief
Product Brief
Speed Bins (Gb/s) Up to 9.6Up to 3.6/2.0
Channel Densities (Gb)Up to 32Up to 24
DRAM StacksUp to 16Up to 12
PHY InterfaceDFI StyleDFI Style
PHY Independent ModeYesYes
Refresh Management SupportYes 
Look-Ahead Command Processing
for Minimum Latency
Integrated Reorder FunctionalityYesAdd-on core
Self-refresh and Power-down
Low Power Modes
RAS FeaturesYesYes
Built-in Activity MonitorYesYes
DFI CompatibleYesYes
End-to-end Data ParityYesYes
Interface to LogicNative or AXINative or AXI

HBM3 Memory Subsystem

HBM is a high-performance memory standard that features reduced power consumption and a small form factor. It combines a 2.5D/3D architecture with a wider interface at a lower clock speed (as compared to GDDR6) to deliver higher overall throughput at a higher bandwidth-per-watt efficiency for AI/ML and high-performance computing (HPC) applications. 

HBM3 Memory Subsystem Example
HBM3 Memory Subsystem Example

Rambus HBM memory controllers support data rates up to 9.6 Gb/s per data pin (HBM3). With its 1024-bit interface and this maximum data rate, it can deliver memory throughput of 1.23 TB/s.

Rambus HBM controllers can be paired with 3rd-party or customer PHY solutions.

HBM3 Memory: Break Through to Greater Bandwidth

HBM3 Memory: Break Through to Greater Bandwidth
AI/ML’s demands for greater bandwidth are insatiable, driving rapid improvements in every aspect of computing hardware and software. HBM memory is the ideal solution for the high bandwidth requirements of AI/ML training, but it entails additional design considerations given its 2.5D architecture. Now we’re on the verge of a new generation of HBM that will raise memory and capacity to new heights. Designers can realize new levels of performance with the HBM3-ready memory subsystem solution from Rambus. 

Frequently Asked Questions about HBM

HBM is a high-performance memory standard that delivers extremely high bandwidth at excellent power efficiency by employing a wide 1024-bit interface at relatively low data rates.

HBM3 memory raises the data rate to 6.4 Gb/s to deliver 819.2 GB/s of bandwidth per HBM3 memory device. The Rambus HBM3 digital controller can operate at 9.6 Gb/s to provide additional design margin.

HBM memory offers excellent bandwidth and capacity with superior power efficiency that makes it an ideal solution for AI/ML training workloads.

To achieve its high bandwidth, HBM uses a 1024-bit wide data interface. This is far more than can be supported on a standard PCB used by traditional (2D) memory solutions. So, HBM employs a silicon interposer where traces can be very finely etched. This structure is called 2.5D. In addition, HBM uses 3D-stacked memory devices, giving HBM a 2.5D/3D architecture.

HBM3 memory is ideal for data-intensive applications like AI/ML, graphics, and HPC, where large amounts of data need to be processed at very high bandwidth.
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