Rambus Blog
When a Chip Just Isn’t a Chip
When most people imagine counterfeit goods, they tend to picture the ‘Rolax’ watch that you can buy from that somewhat
Optimizing Non-Volatile Memory with NOVA and Ziggurat
Maximizing Hybrid Memory Systems with NOVA NOVA – a file system designed to maximize performance on hybrid memory systems –
Validating Cryptographic Algorithms to FIPS 140-2
NIST, the National Institute of Standards and Technology, is a United States Department of Commerce agency tasked with both the
Presenting Multiple Roots of Trust Across the World
Our friends at SiFive have been hosting a worldwide series of technical seminars, and Rambus has joined them for a
DPAWS 9.0: Easy Point and Click For Test and Security Engineers
It used to be that identifying and addressing potential side channel attack risks in semiconductor devices like SoCs was a
AI/ML ramps up despite training challenges
Training AI/ML algorithms A new survey commissioned by Alegion reveals that 8 out of 10 companies have found training AI/ML
Are ML Systems Robust Enough for the Here and Now?
Researchers at MIT have created a way to determine robustness levels of machine learning (ML) models for various tasks. And
Will Neuromorphic Chips Outpace AI Processors?
Add this one to your list of artificial intelligence (AI) terms — neuromorphic chips. They’re described as chips that model
The Autobahn Lanes of HBM2 and GDDR6
Narrow roads versus silicon superhighways Steven Woo, Rambus fellow and distinguished inventor, recently spoke with Ed Sperling of Semiconductor Engineering
What About AI Regulations?
These days, there’s considerable talk and hoopla surrounding artificial intelligence/AI. Tech companies on a worldwide basis are talking about how
The Security Risks of Silicon Complexity: Part 2
In part one of this two-part blog series, Ben Levine, Senior Director of Security Product Marketing at Rambus, and Semiconductor
5G Eats Up More Memory
5G is more memory hungry compared to previous generations, according to Gary Hilson, memory editor at EE Times. In his
Helena Handschuh’s Article: RISC-V, DARPA Advance Security
Helena Handschuh wrote a recent article in EE Times stating that “with the proliferation of intelligent devices, the industry needs
The Security Risks of Silicon Complexity
Ben Levine, Senior Director of Security Product Marketing at Rambus, recently spoke with Semiconductor Engineering editor-in-chief Ed Sperling about the
Most Complex Processor Chip for AI Acceleration
EE Times reports that Graphcore of Bristol, UK has put on the market a new type of processor for AI acceleration.
Ben Levine Writes About CMRT Benefits in Embedded Computing Design Magazine
Ben Levine, Sr. Director, Product Marketing, Cryptography Products Division, recently penned an article in Embedded Computing Design Magazine letting SoC
Tech Firms Lax On Embedded Security
The glaring headline in a ComputerWeekly.com post is that “Nearly a quarter of tech firms do not security check their
How not to get pwned @ automotive cyber-security
Hacking a Tesla The past few weeks have been a busy time for white hat hackers demonstrating cyber-security vulnerabilities in
Rambus’ Ben Levine talks IoT security and cryptography with EDA Café
Ben Levine, Senior Director of Product Marketing at Rambus, recently sat down with Sanjay Gangal of EDA Café to discuss
Chipmakers: In the Horns of a Dilemma
Not since the inventions of the silicon transistor and integrated circuit (IC) have chipmakers found themselves in a quandary like
Is Post-Quantum Cryptography Necessary?
The burning question in some security scientists’ minds these days is: “Will post-quantum cryptographic algorithms be necessary in the future?”