At Rambus, we create cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.
GDDR7 Controller
The Rambus GDDR7 controller IP core is designed for use in applications requiring high memory throughput including artificial intelligence/machine learning (AI/ML), graphics, high-performance computing (HPC).
It supports 160 Gigabytes per second (GB/s) throughput for a GDDR7 memory device enabling next-level performance for AI accelerators and GPUs using GDDR7 memory.
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Product BriefHow a GDDR7 Memory Controller Implementation in a Subsystem works
The GDDR7 controller supports all GDDR7 link features including PAM3 and NRZ signaling. Optimized for high efficiency and low latency across a wide variety of traffic scenarios, it offers low-power support (self-refresh, hibernate self-refresh, dynamic frequency scaling, etc.) and Reliability, Availability and Serviceability (RAS) features such as end-to-end data path parity, parity protection for stored registers, etc. Comprehensive memory test support and integration support for third-party PHYs are available.
Supercharging AI Inference with GDDR7
A rapid rise in the size and sophistication of AI inference models requires increasingly powerful AI accelerators and GPUs deployed in edge servers and client PCs. GDDR7 memory offers an attractive combination of bandwidth, capacity, latency and power for these accelerators and processors. The Rambus GDDR7 Memory Controller IP offers industry leading GDDR7 performance of up to 40 Gbps and 160 GB/s of available bandwidth per GDDR7 memory device.
Solution Offerings
- Supports up to 40 Gbps per pin operation
- 2.5 GHz CK4 clock
- 1.25 GHz controller clock
- Internal data path 32x memory width (i.e. 256 bits for 8-bit memory)
- Optimized for high efficiency and low latency across a wide range of traffic scenarios (random/sequential, short/long bursts, etc.)
- Optimized command sequence for highest bus utilization including per-bank refresh scheduling: single queue structure handles look-ahead activates/ precharges and read/write ordering for minimal latency
- Up to 4 AXI ports per channel
- Async or sync to core memory controller (lower latency for sync configuration)
- Multiple interface data width options (128, 256, 512)
- Up to 2 local ports per channel
- Supports low power modes
- Power-down
- Self-refresh, hibernate self-refresh
- Dynamic frequency scaling (DFS)
- Sleep
- Progressive low power
- Supports all GDDR7 link features
- CRC with retry for reads and writes
- PAM3 and NRZ signaling
- Data scramble
- Data poison
- Clamshell mode
- DQ logical remap
- Advanced RAS features
- End-to-end data path parity
- Parity protection for all stored registers
- Controller (source code)
- Testbench (source code)
- Complete documentation
- Expert technical support
- Maintenance updates
- Customization
- SoC integration
Protocol Compatibility
| Protocol | Data Rate (Gbps) Max. | Application |
|---|---|---|
| GDDR7 | 40 | AI, Graphics, HPC |
HBM3E and GDDR6: Memory Solutions for AI
AI/ML changes everything, impacting every industry and touching the lives of everyone. With AI training sets growing at a pace of 10X per year, memory bandwidth is a critical area of focus as we move into the next era of computing and enable this continued growth. AI training and inference have unique feature requirements that can be served by tailored memory solutions. Learn how HBM3 and GDDR6 provide the high performance demanded by the next wave of AI applications.
