Join Rambus at FMS: Future of Memory and Storage! Join us for two presentations on August 6th: Al Inference Needs a Mix-and-Match Memory Strategy and From Monolithic SoCs to Chiplets: A new Hardware Security Paradigm. Read on for abstracts and more information about the presentations.
Al Inference Needs a Mix-and-Match Memory Strategy
Speaker: Nidish Kamath
When: August 6 at 8:55
Abstract: AI inference spans diverse workloads, from low‑latency chat to long‑context reasoning and large‑scale recommendations—making single, monolithic accelerator and memory designs increasingly inefficient. This talk explains how inference naturally splits into prefill and decode stages with fundamentally different bottlenecks: prefill is compute‑bound, while decode is dominated by memory bandwidth and latency. By matching memory technologies to each stage, using cost‑efficient GDDR or LPDDR for prefill and reserving premium HBM for decode, with pooled memory for KV offload, operators can significantly reduce cost per token without sacrificing latency. The session outlines emerging disaggregated architectures for AI inference workloads.
From Monolithic SoCs to Chiplets: A new Hardware Security Paradigm
Speaker: Berardino Carnevale
When: August 6th at 13:25
Abstract: Chiplet based architectures are transforming SoC design, but they also upend long standing security assumptions that were implicitly guaranteed by a monolithic die. By disaggregating a monolithic die into multiple, often multi-vendor chiplets, the implicit silicon trust boundary disappears, expanding the attack surface to include chiplet substitution, weak chiplet compromise, and exposed die to die interconnects. This discussion explores why traditional SoC security models do not scale to chiplet systems and introduces a system level security paradigm based on distributed trust with centralized authority.
To register and learn more about FMS, follow the link here: https://www.terrapinn.com/conference/future-memory-storage/index.stm
About FMS
Our over-arching mission is to help accelerate the move towards a world where advanced memory and storage technologies enable AI systems, data centers, hyperscalers and enterprises to operate at unprecedented scale, speed and efficiency. All the while supporting the engineers and architects building the infrastructure of the future.
FUTURE OF MEMORY & STORAGE is a multi-faceted event experience providing the most comprehensive and technically credible memory and storage event on the planet. It is carefully curated by an experienced team plugged into a global network.
Our presenters are visionary industry leaders, engineers and architects from all disciplines. They are selected for their relevance, dynamism and insight.
