|SerDes Products||Product Brief||Protocol||Application|
|PCIe PHY||PCIe 2/3/4||Peripherals, chip-to-chip connectivity, data centers|
|112G PHY||10.3-106.25 Gbps Multi-protocol||Networking, 5G infrastructure, hyperscale data centers|
|56G PHY||9.95-58 Gbps Multi-protocol||Networking, 5G infrastructure, hyperscale data centers|
|32G PHY||2.5-32 Gbps Multi-protocol||Networking, 5G infrastructure, hyperscale data centers|
|28G PHY||1.25-28 Gbps Multi-protocol||Server, storage, networking|
|16G PHY||1.25-16 Gbps Multi-protocol||Enterprise, high-performance computing (HPC)|
|12G PHY||1.25-12 Gbps Multi-protocol||Networking, graphics, optical communications|
|6G PHY||1.25-6.375 Gbps Multi-protocol||Server, storage, networking|
Flexible packaging options
Improved margin and yield
Wide range of PLL clock multipliers
Fine-grain power up/down options
Our SerDes interfaces are high-quality, complete PHY solutions that were designed with a system-oriented approach in mind to maximize flexibility and make them easy to integrate. They have been optimized for power and area at peak bandwidth and enable our customers to differentiate while maintaining complete compatibility with industry standards.
The SerDes interface family includes a range of solutions to meet your speed and application needs. Running up to 56gigabits per second (Gbps), our multi-protocol PHYs support server, storage, networking, graphics, and optical and communications applications.
SerDes PHY configuration
We offer complete PHY solutions – our SerDes PHY includes a Physical Media Attachment (PMA) hard macro and Physical Coding Sub-layer with Built-in Self-Test (PCS-BIST) soft macro. That simplifies integration and minimizes time-to-market. The PHYs can also be configured to multiple channel widths and packaging options. Outside of the PHY itself, our solutions also include complete documentation and access to our in-house experts for optional design integration and bring-up support services to make integration as straightforward as possible.
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