The Rambus 56G MPS PHY is a PAM-4 and NRZ compliant IP solution that provides reliable performance across challenging long-reach data center environments. A 28 GS/s ADC integrated directly into the architecture enables future scalability and extended reach. With high performance and multi-protocol compatibility, the PHY supports data rates from 9.95 to 58 Gbps across copper and backplane channels with more than 35dB channel insertion loss. Flexible system design is enabled through the ability to control the power consumption of the PHY.
56G MPS PHY Subsystem Example
The 56G MPS PHY is designed with a system-oriented approach, taking the interface, interconnect and channel into account when optimizing performance and features to maximize flexibility in today’s most challenging system environments and applications. This makes the PHY ideal for many long-reach, copper and backplane system environments.
Available in advanced FINFET process.
Comprehensive chip and system design reviews
Engineering design services:
|Protocol||Data Rate (Gbps)||Application|
|400GAUI-8 LR||53.125||Telecom and networking|
|400GAUI-8 MR||53.125||Telecom and networking|
|100G-KR4 LR||25.78125||Telecom and networking|
|10G-KR||10.3125||Telecom and networking|
|CEI56G-LR||36 – 58||Copper backplane networking|
|CEI56G-MR||36 – 58||Chip-to-Chip connectivity|
|CEI28G-MR||19.9 – 28.1||Copper backplane networking|
|CEI25G-LR||19.9 – 25.8||Copper backplane networking|
|CEI11G-LR||9.95 – 11.2||Copper backplane networking|