The Rambus Root of Trust RT-660 (formerly the CryptoManager RT-660) is a fully programmable, FIPS 140-2 and FIPS 140-3 compliant hardware security anti-tamper core offering security by design for government and military mission-critical applications. The RT-660 protects against a wide range of hardware and software attacks with state-of-the-art anti-tamper security techniques. Government and military hardware require the highest security protections due to sensitive information being stored and processed. The RT-660 is a military grade security co-processor, built on a custom-designed 32-bit RISC-V architecture, along with dedicated secure memories.
The RT-660 offers superior anti-tamper attack protection through the implementation of Differential Power Analysis (DPA)-protected symmetric AES, RSA, and ECC cryptographic accelerator cores. Additional cores include a NIST SP800-compliant TRNG (true random number generator), Public Key (RSA to 4096-bits and ECC up to 521-bits), AES (all modes). Optionally, designers can select 3DES (DPA or standard), HMAC, and SHA-2 SHA-3 (DPA or standard, all modes) crypto accelerators. The RT-660 core is both FIPS 140-2 and FIPS 140-3 CAVP/CMVP compliant. The RT-660 is the ideal choice for chip and system architects designing FPGA and ASIC solutions for government applications.
While built upon a RISC-V architecture, the RT-660 is a custom implementation designed specifically for security use cases. Rambus employed over 20 years of device security experience to build a co-processor providing the highest levels of siloed and layered security. The RT-660 is designed for integration into military and government ASICs and FPGAs, offering secure execution of authenticated user applications, tamper detection and protection, and secure storage and handling of keys and security assets.
The Root of Trust offers a siloed approach to security. While located on the same silicon as the main processor, the secure processing core is physically separated. A layered security approach enforces access to crypto modules, memory ranges, I/O pins, and other resources, and assures critical keys are available through hardware only with no access by software. The Rambus Root of Trust RT-660 supports all commonly deployed main processor architectures, including ARM, RISC-V, x86 and others.
The Rambus Root of Trust supports multi-tenant deployments by offering true multiple root of trust capabilities. Each individual Secure Application can be assigned its own unique keys, meaning permissions and access levels are set completely independent of others. Secure Applications are siloed from each other, ensuring the best approach to security. OEMs can determine access levels and permissions for each and all processes operating within the secure processor.
The RT-660 is available in an FPGA configuration for synthesis in programmable logic. This configuration is designed to map optimally (for maximum utilization and frequency) into an FPGA fabric and connect either to on-board or external CPUs. In addition, the RT-660 is expanded with an additional OTP emulation model to overcome the lack of (or limitation of) true nonvolatile one-time programmable memory in certain FPGA families. This module allows storing secure assets in external flash in a secure way.
Included with the RT-660 Hardware Root of Trust are a series of standard secure applications (“containers”) to speed development, including secure boot, identity management, HSM reference, and others. A container development kit (CSDK) is also included to allow the development of custom containers for specific use cases.
As the inventor and pioneer of DPA and an acknowledged leader in device security, Rambus is uniquely qualified to provide anti-tamper solutions for the most stringent requirements. Rambus technologies protect more than 9 billion chips per year, and as a US-based, independent company, Rambus has the experience and pedigree to be the solution provider of choice. Rambus has for more than 20 years supplied solutions for government and defense applications, including anti-tamper cores, software libraries, and testing workstations.
Side-channel attacks, including simple power analysis and differential power analysis, conducted against electronic gear are relatively simple and inexpensive to execute. An attacker does not need to know specific implementation details of the cryptographic device to perform these attacks and extract keys. As all physical electronic systems routinely leak information, effective side-channel countermeasures should be implemented at the design stage to ensure protection of sensitive keys and data.