The Rambus PCIe 3.1 Controller with AXI is designed to achieve maximum PCI Express (PCIe) 3.1 performance with great design flexibility and ease of integration. The controller with the Rambus PCIe 3.1 PHY forms a comprehensive interface subsystem solution delivering high-bandwidth and low-latency connectivity for demanding applications in data center, edge and graphics.
Briefs
PCIe 2.1 Controller Product Brief
The Rambus PCIe 2.1 Controller is designed to achieve maximum PCI Express (PCIe) 2.1 performance with great design flexibility and ease of integration. It is backward compatible with the PCIe 1.1 specification.
PCIe 2.1 Controller with AXI Product Brief
The Rambus PCIe 2.1 Controller with AXI is designed to achieve maximum PCI Express (PCIe) 2.1 performance with great design flexibility and ease of integration. It is backward compatible with the PCIe 1.1 specification.
PCIe 5.0 Controller Product Brief
The PLDA PCIe 5.0 controller core is designed for maximum performance and ease of use for PCI Express (PCIe) 5.0 applications. It comprises a complete SerDes subsystem with the Rambus PCIe 5.0 PHY or can integrate with PIPE 5.x-compliant 3rd-party PHYs. The controller is backwards compatible with PCIe 5.0, 4.0, and 3.1/3.0.
INSPECTOR for PCIe 5.0 Product Brief
Interposer Card for Diagnostic Testing, Exercising and Debug of PCIe Devices at up to Gen5 32 GT/s speed.
Gen5ENDPOINT Product Brief
PCIe 5.0 Endpoint Reference Platform for Prototyping and Development of PCIe 5.0 Root Port/Host Silicon and Devices.