The Rambus IME-IP-341 IME engine can be seamlessly integrated into a customer’s system-on-chip (SoC) to address security and privacy concerns of data in use in off-chip DDR memory. The low latency encryption, decryption and data authentication is handled by the IME-IP-341 in the data path between the processor’s last-level cache and the memory controller connected to off-chip DRAM memory.
Security IP
ASCON-IP-41 Product Brief
The Rambus ASCON-IP-41 is an efficient implementation of NIST’s lightweight crypto algorithm family ASCON. ASCON is a single algorithm defined in different modes to support AEAD and HASH operations. As a multi-purpose algorithm with minimal area requirements ASCON is extremely suitable for low-cost and low-power applications.
Protocol-IP-68 Product Brief
The Protocol-IP-68 engine is a high-performance, multi-channel transform engine that provides the complete AES-GCM/GMAC- and ChaCha20/Poly1305-based IPsec ESP packet transform, bypass/drop and basic crypto processing at rates up to 100Gbps (AES-GCM) and 50Gbps (ChaCha20/Poly1305). The engine is designed for integration in systems that require line-rate IPsec encryption for one or more ports. The engine is provided with separate ingress and egress data paths.
Protocol-IP-67 Product Brief
The Protocol-IP-67 engine is a high-performance, multi-channel transform engine that provides the complete AES-GCM/GMAC-based IPsec ESP packet transform, bypass/drop and basic crypto processing at rates up to 800Gbps (there are multiple area-optimized options). The engine is designed for integration in systems that require line-rate IPsec encryption for one or more ports. The engine is provided with separate ingress and egress or as combined (ingress and egress) data paths.
MACsec-IP-361 Product Brief
The MACsec-IP-361 is a plug-and-play solution for adding MACsec on the xMII side of an Ethernet subsystem. It is ideally positioned for designs where the MAC function is tightly integrated with the system-side, for example DMA-MAC Ethernet controllers or switch core IP with integrated MAC modules.
ICE-IP-339 Inline Cipher Engine with AXI Product Brief
The Rambus IME-IP-339 IME Engine can be seamlessly integrated into a customer’s system-on-chip (SOC) to address security and privacy concerns of data-in-use in DDR memory. The IME-339 provides an AXI-4 compliant wrapper around the industry-proven Rambus ICE-IP-338 (inline cipher engine). This allows the IME-339 to act as a transparent data processing pipeline on the read and write AXI data channels.
