Silicon-proven, high-performance digital IP cores are optimized for use in SoCs, ASICs and FPGAs. These market leading solutions for memory, PCIe, MIPI, and video compression address data center, artificial intelligence/machine learning (AI/ML), communications, mobile, IoT, and automotive applications.
|Memory Controllers||HBM2E, GDDR6, DDR4/3, LPDDR4||AI, Automotive, Data Center, Edge, Mobile|
|CXL & PCI Express Controllers||CXL 2.0/1.1 PCIe 6.0, 5.0, 4.0, 3.1, 2.1, 1.1 CCIX 1.1, USB4||Data Center, Computing, Edge, Networking|
|MIPI Controllers||CSI-2, DSI-2||Automotive, IoT, Mobile|
|Video Compression and Forward Error Correction||VESA DSC, VDC-M, DisplayPort, HDMI||Automotive, Mobile, IoT, AR/VR, Pro AV|
Industry-leading data rates
Full integration and verification with PHY
Source code available
Full set of add-on cores
Rambus high-performance PHYs and digital controllers provide chip designers with complete interface subsystem solutions for next-generation designs.
The PCI Express® (PCIe) interface is the critical backbone that moves data at high bandwidth between various compute nodes such as CPUs, GPUs, FPGAs, and workload-specific accelerators. The rise of cloud-based computing and hyperscale data centers, along with high-bandwidth applications like artificial intelligence (AI) and machine learning (ML), require the new level of performance of PCI Express 5.0.