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The Rambus MIPI DSI-2 controller core is optimized for high performance, low power and small size. The core is fully compliant with the DSI-2 standard and implements all three layers defined therein: Pixel to Byte Packing, Low Level Protocol, and Lane Management. An ASIL-B version of the core is available and includes a Safety Manual, Design Failure Mode & Effects Analysis (DFMEA) and Failure Mode, Effects and Diagnostic Analysis (FMEDA).
Rambus MIPI CSI-2 and DSI-2 controller IP solutions are available through M31.
M31 is a leading semiconductor IP provider that works with customers worldwide to deliver proven IP solutions.
For more information about licensing Rambus MIPI controller IP from M31, visit their website at m31tech.com.
Visually lossless video compression is essential for handling the growing bandwidth requirements of cutting-edge displays with higher resolutions, faster refresh rates, and greater pixel depths. This presentation will show designers how they can develop cutting-edge display products without compromising on display quality, battery life or cost using a combination of VESA video compression and MIPI DSI-2 technology.
Engineering Design Services:
| Protocol | Data Rate (Gbps) | Application |
|---|---|---|
| DSI-2/DSI | 9.0+ | Mobile, IoT, Automotive |
