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Interface IP

Debug and Test Solutions

INSPECTOR for PCIe 4.0

Interposer Card for Diagnostic Testing, Exercising and Debug of PCIe Devices at up to Gen4 16 GT/s speed.

Inspector for PCIe 4.0
Inspector for PCIe 4.0

The PLDA INSPECTOR is a PCIe 4.0 compliant interposer module designed for non-intrusive monitoring, diagnostic, exercising and debug of PCIe devices. INSPECTOR uses transparent switching technology to connect on the upstream side to a PCIe host platform, and on the downstream side to the device under test (DUT). INSPECTOR supports PCIe 1.x, 2.x, 3.x, and 4.0 interfaces on either ports, and up to 8 lanes (x8). It is typically used for bring-up and diagnostic testing of PCIe 4.0 DUTs at PCIe 4.0 16 GT/s speed using existing PCIe hosts operating at PCIe 3.0 8 GT/s speed, but can support any link speed/width combination on upstream and downstream ports. INSPECTOR’s built-in diagnostic capabilities allows validation engineers to instantly diagnose issues with their PCIe devices, without the need for expensive test equipment.

Gen4HOST

PCIe 4.0 Host Enabling Reference Platform for Prototyping & Development of PCIe 4.0 Devices and Applications.
Gen4HOST
Gen4HOST

The PLDA Gen4HOST provides a platform for prototyping and developing PCIe 4.0 hardware and software. At the core of Gen4HOST is the PCI-SIG compliant PLDA PCIe 4.0 Switch IP running on a Xilinx® Virtex® UltraScale+™ FPGA. Gen4HOST provides a PCIe 3.0 x16 (upstream) to PCIe 4.0 x8 (downstream) integration backplane for development and validation of PCIe 4.0 endpoints, and is also available in a reversed configuration (PCIe 4.0 upstream, PCIe 3.0 downstream) for development and validation of PCIe 4.0 Hosts and Root Complexes. By working with Gen4HOST, developers of PCIe 4.0 devices can accelerate their software, firmware, and hardware developments, in their production environment, using the Operating System of their choosing.

 

Gen4ENDPOINT

PCIe 4.0 Endpoint Reference Platform for Prototyping and Development of PCIe 4.0 Root Port/Host Silicon and Devices.

Gen4ENDPOINT

GEN4ENDPOINT

The PLDA Gen4ENDPOINT is a PCIe add-in card suitable for prototyping and developing PCIe 4.0 hardware and software. At the core of Gen4ENDPOINT is the PCI-SIG compliant PLDA PCIe 4.0 Switch IP running on a Xilinx® Virtex® UltraScale+™ FPGA. Gen4ENDPOINT features an integrated PCIe 4.0 endpoint agent with DMA and memory-mapped I/O capability. By working with Gen4ENDPOINT, developers of PCIe 4.0 host systems and root complexes can accelerate their software, firmware, and hardware developments, in their production environment, using the Operating System of their choosing.

CXL Memory Interconnect Initiative: Enabling a New Era of Data Center Architecture

CXL Memory Interconnect Initiative: Enabling a New Era of Data Center Architecture

In response to an exponential growth in data, the industry is on the threshold of a groundbreaking architectural shift that will fundamentally change the performance, efficiency and cost of data centers around the globe. Server architecture, which has remained largely unchanged for decades, is taking a revolutionary step forward to address the growing demand for data and the voracious performance requirements of advanced workloads.