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Home > Press Releases > Corporate > Media Alerts > Media Alert – Rambus To Demonstrate High-speed Interface Technologies and Architectures At DesignCon 2007

Media Alert – Rambus To Demonstrate High-speed Interface Technologies and Architectures At DesignCon 2007

LOS ALTOS, CALIFORNIA, UNITED STATES – 01/29/2007

 

Who: Rambus Inc. (Nasdaq: RMBS)
Where: DesignCon 2007
Booth # 205
Santa Clara Convention Center
Santa Clara, CA, USA
When: January 29-31, 2007

 

Join Rambus at DesignCon 2007 to learn more about the advanced XDR™ memory architecture and its most recent implementation in the PLAYSTATION®3 computer entertainment system. Rambus demos, displays and presentations include:

Rambus Demos and Displays

  • XDR™ memory architecture, a differential memory system solution with data rates ranging from 3.2-8.0 GHz. Technology demonstration at 3.2Gbps data rate with FlexPhase™ circuit technology calibration and Octal Data Rate (ODR) read/write operation.
  • FlexIO™ processor bus, the industry’s fastest processor bus solution offering data rates of 400 MHz to 8.0 GHz, while reducing overall package, board, and system costs.
  • DDR technology performing memory transactions to and from a DDR2 device operating at 800Mbps (400MHz clock).
  • Rambus Gen2 solution, compliant with PCI Express®* base specification, revision 0.5, with transfer rates up to 5Gbps. Silicon proven technology demonstration includes transaction, data link and PHY layers.
  • LabStation™ bring-up, debug and characterization tool combines the best in hardware, software and test methodology to enable rapid automated system testing of silicon and board to measure system margin, thereby improving yields and time-to-market.

Rambus Presentations

  • Serial Data Equalization
  • Building Verification IP for Reusability – Based on SystemVerilog and TLM Standards
  • Performance Comparison of Edge-Based Equalization and Data-Based Equalization for Transmitter and Receiver
  • Impact of Backplane Connector Pin Field on Trace Impedance and Vertical Field Crosstalk
  • Creating a Generic Behavioral Model: DDR-Based Memory Systems Using SystemC/TLM
  • Accurate Method for Analyzing High-Speed I/O System Performance
  • PHY Verification – Still an Open Problem
  • Analysis of Supply Noise Induced Jitter in Gigabit I/O Interfaces

Technical Panel Participation

  • Who Verifies Your Third-Party Design IP

For registration and additional information, please visit http://www.designcon.com/2007/.

About Rambus Inc.

Rambus is one of the world’s premier technology licensing companies specializing in the invention and design of high-speed chip architectures. Since its founding in 1990, the Company’s patented innovations, breakthrough technologies and renowned integration expertise have helped industry-leading chip and system companies bring superior products to market. Rambus’ technology and products solve customers’ most complex chip and system-level interface challenges enabling unprecedented performance in computing, communications and consumer electronics applications. Rambus licenses both its world-class patent portfolio as well as its family of leadership and industry-standard interface products. Headquartered in Los Altos, California, Rambus has regional offices in North Carolina, India, Germany, Japan, Korea and Taiwan. Additional information is available at www.rambus.com.

###

Rambus and the Rambus logo are registered trademarks of Rambus Inc. XDR, FlexPhase, FlexIO and LabStation are trademarks of Rambus Inc. *PCI Express is a registered trademark of the PCI-SIG. The PCI-SIG is the special interest group that owns and manages PCI specifications as open industry standards. All other trade names are the service marks, trademarks, or registered trademarks of their respective owners.

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