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A research program focused on improving performance, efficiency and TCO for a new era of data center architecture.
Effectively expands main memory for high-capacity workloads
Through the CXL Memory Interconnect Initiative, Rambus is researching and developing solutions to enable a new era of data center performance and efficiency. Announced on June 16, 2021, this initiative is the latest chapter in the 30-year history of Rambus leadership in the development of breakthrough memory and chip-to-chip interconnect technology and products.
Realization of the chip solutions needed for the memory expansion and pooling use cases, and further those needed for server disaggregation and composability, will require the synthesis of a number of critical technologies. Rambus has been researching memory solutions for disaggregated architectures for close to a decade and leverages a system-aware design approach to solve these next-generation challenges. This initiative brings together our expertise in memory and SerDes subsystems, semiconductor and network security, high-volume memory interface chips and compute system architectures to develop breakthrough interconnect solutions for the future data center.
In response to an exponential growth in data, the industry is on the threshold of a groundbreaking architectural shift that will fundamentally change the performance, efficiency and cost of data centers around the globe. Server architecture, which has remained largely unchanged for decades, is taking a revolutionary step forward to address the growing demand for data and the voracious performance requirements of advanced workloads.
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