There are many challenges to achieving good “memory security,” especially in that the term “memory” could refer to on-chip SRAM, embedded non-volatile memory, or even off-chip memory (e.g., both DRAM or mass-storage non-volatile). We refer to data within non-executable NVM to be “data at rest,” while data within volatile memory like SRAM or DRAM to be “data in use.” In both domains, data within these memories is of interest to an adversary – it has either immediate value (e.g., passwords, secret keys, AI/ML datasets, etc.), or it can indirectly lead to exposure of those valuable assets. This presentation will focus on the key aspects of memory security for data-in-use applications: 1) data privacy, 2) data authenticity, and 3) data freshness, and how those security aspects weigh against critical performance metrics including latency and memory overhead.
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