Advanced innovations to enable terabyte per second memory subsystems operating at a record 16Gbps
RAMBUS DEVELOPER FORUM – TOKYO, JAPAN – 11/28/2007 – Rambus Inc. (NASDAQ:RMBS), one of the world’s premier technology licensing companies specializing in high-speed memory architectures, today unveiled its Terabyte Bandwidth Initiative. This technology initiative includes the development of new memory signaling innovations that will facilitate blazing fast data rates of 16Gbps and enable a future memory architecture that can deliver an unprecedented terabyte per second (TB/s) of memory bandwidth (1 terabyte = 1,024 gigabytes) to a single System-on-Chip (SoC). With the technology developed through this initiative, Rambus will dramatically increase the data rate of memory above the current world’s fastest memory, the Rambus 4.8GHz XDR™ DRAM. Rambus will demonstrate a silicon test vehicle for its Terabyte Bandwidth Initiative today at RDF-Japan.
“We will drive memory signaling technology to performance levels that are an order of magnitude greater than what can be achieved today,” said Kevin Donnelly, senior vice president of engineering at Rambus Inc. “Continuing the Rambus tradition of innovation, our engineers and scientists have pioneered new technologies that will enable terabyte per second memory architectures for gaming, computing and consumer electronic systems of the next decade.”
Rambus’ Terabyte Bandwidth Initiative includes ground-breaking innovations for a new generation of memory systems, such as:
- 32X data rate – 32 data bits per input clock cycle;
- Fully Differential Memory Architecture (FDMA) – The industry’s first differential signaling for both data and command/address (C/A);
- FlexLink™ C/A – The industry’s first full-speed, point-to-point C/A link.
The Terabyte Bandwidth Initiative is the latest in a long tradition of pioneering Rambus technology development programs. For more than seventeen years, Rambus engineering teams have developed the leadership innovations that enable faster signaling and advanced system designs. Committed to the advanced research and development of high-speed memory architectures, Rambus invests heavily in advanced circuit design, high-speed logic interfaces, low-power interface solutions, system engineering, signal integrity, verification, and testing. To date, Rambus engineers and scientists have developed innovations resulting in over 1000 issued and pending patents worldwide.
More information on the Terabyte Bandwidth Initiative and its innovations will be presented at the Rambus Developer Forum (RDF) in Tokyo, Japan (November 28-29, 2007, http://forum.rambus.co.jp/). Additional information on the Terabyte Bandwidth Initiative is also available at http://www.rambus.com/terabyte.
