Found 3650 Results

Toshiba Announces Immediate IP Subsystem Availability of PCI Express® and DDR3 for Custom LSI Platforms

https://www.rambus.com/toshiba-announces-immediate-ip-subsystem-availability-of-pci-express/

May 31, 2016 TOKYO– Toshiba Corporation’s (TOKYO: 6502) Storage & Device Solutions Company announced today the immediate availability of PCI Express *1 and DDR3 SDRAM *2 IP subsystems *3 developed in conjunction with Northwest Logic, a leading provider of high-performance, easy-to-use, silicon-proven PCI Express and Memory Interface IP cores. These subsystems are available on custom […]

IoT on the edge

https://www.rambusblog.com/2016/03/30/iot-on-the-edge/#new_tab

McObject CEO Steve Graves recently noted that there is little industry discussion about data management on so-called edge nodes comprising the Internet of Things (IoT). “A vast number of edge devices will need to store, retrieve and analyze some data right where they sit, before shipping anything ‘upstream’ to gateway or server-based data aggregation points […]

IoT on the edge

https://www.rambus.com/blogs/iot-on-the-edge-2/

McObject CEO Steve Graves recently noted that there is little industry discussion about data management on so-called edge nodes comprising the Internet of Things (IoT). “A vast number of edge devices will need to store, retrieve and analyze some data right where they sit, before shipping anything ‘upstream’ to gateway or server-based data aggregation points […]

Balancing cores and memory with Smart Data Acceleration

https://www.rambusblog.com/2016/03/29/balancing-cores-memory-smart-data-acceleration/#new_tab

Ed Sperling of Semiconductor Engineering recently noted that adding more cores to a processor doesn’t necessarily improve system performance. In fact, designing the wrong size or type of core may actually waste power. “This has set the stage for a couple of broad shifts in the semiconductor industry,” Sperling explained. “Memory architectures can play an […]

Balancing cores and memory with Smart Data Acceleration

https://www.rambus.com/blogs/balancing-cores-memory-smart-data-acceleration/

Ed Sperling of Semiconductor Engineering recently noted that adding more cores to a processor doesn’t necessarily improve system performance. In fact, designing the wrong size or type of core may actually waste power. “This has set the stage for a couple of broad shifts in the semiconductor industry,” Sperling explained. “Memory architectures can play an […]

Architecting new memory for the IoT

https://www.rambusblog.com/2016/03/28/architecting-new-memory-iot/#new_tab

The once indefatigable Moore’s Law is beginning to slow, even as data, driven by a burgeoning Internet of Things (IoT), continues to increase exponentially. Consequently, a slew of new memory architectures, including those utilizing 2.5D and 3D packaging, are evolving to meet the demands of a new digital age.

Architecting new memory for the IoT

https://www.rambus.com/blogs/architecting-new-memory-iot/

The once indefatigable Moore’s Law is beginning to slow, even as data, driven by a burgeoning Internet of Things (IoT), continues to increase exponentially. Consequently, a slew of new memory architectures, including those utilizing 2.5D and 3D packaging, are evolving to meet the demands of a new digital age. Nevertheless, As Ed Sperling of Semiconductor […]

These are the invisible cameras of the future

https://www.techradar.com/us/news/photography-video-capture/these-are-the-invisible-cameras-of-the-future-1317682#new_tab

Hidden cameras are getting harder to spot: old, hefty spy gadgets you had to hide under a thick coat have been replaced tiny devices in the tips of pens that live stream HD video. Soon, thanks to new tech, spycams could even be entirely invisible.

CryptoMedia Content Protection Core Product Brief

https://go.rambus.com/cryptomedia-content-protection-core-product-brief#new_tab

Designed to meet the growing demand for secure content delivery to a range of devices, such as Set Top Boxes (STBs) and smart TVs, our CryptoMedia Content Protection Core provides Operators and over-the-top (OTT) services with robust protection combined with ability to save costs by replacing the smart card with a hardware root-of-trust embedded within […]

Genode OS adds RISC-V support

https://www.rambusblog.com/2016/03/24/genode-os-adds-risc-v-support/#new_tab

The open source instruction set architecture known as RISC-V has gained significant momentum over the past year. To be sure, the ISA is now backed by a number of industry heavyweights, including Google, LG and BAE Systems.

Rambus logo