At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
Found 3619 Results
Reliability and Supply Chain Security for the Automotive Semiconductor Industry
https://event.on24.com/wcc/r/5312579/CEF890ACADE70614346BC1F6A7CDFF58#new_tabThis webinar examines why reliability and security have become inseparable drivers for next‑generation automotive chips, and how a lifecycle‑based approach is required to meaningfully reduce recall risk. We will review real‑world examples of recalls caused by electronic failures, explore the evolving standards landscape driving higher expectations for reliability and traceability, and walk through the end‑to‑end chip lifecycle from wafer fabrication to in‑vehicle operation.
Enabling Next‑Generation Client Memory with Rambus DDR5 CUDIMM/CSODIMM and LPCAMM2 Chipsets
https://event.on24.com/wcc/r/5296719/3E5297E5B8B9B8F8C14B74BEB3F4D81C#new_tabn this webinar, Rambus experts will explore how complete client memory interface chipsets enable high‑performance DDR5 CUDIMM and CSODIMM modules operating up to 7200 MT/s, with capabilities for overclocking. Also covered will be chipsets for the latest LPCAMM2 modules designed for thin, power‑efficient client systems. Attendees will gain insight into the architectural challenges of high‑speed client memory, including signal integrity, power delivery, sideband management, and thermal considerations, and how Rambus chipset solutions address these challenges at the module level.
MACsec Explained: Everything You Need to Know
https://www.rambus.com/blogs/macsec/[Last updated on April 8, 2026] MACsec (Media Access Control Security) is an Ethernet security standard that encrypts and authenticates data in motion at Layer 2 of the OSI model, protecting traffic as it moves between directly connected devices. To achieve end‑to‑end security, data must be secured throughout its entire lifecycle: when it is stored, […]
Google, Quantum Attacks, and ECDSA: Why There’s No Need to Panic and Why Preparation Matters Now
https://www.rambus.com/blogs/google-quantum-attacks-and-ecdsa-why-theres-no-need-to-panic-and-why-preparation-matters-now/Over the past several weeks, we’ve seen growing discussion across the industry about Google’s latest publications on quantum computing and cryptography. In some corners, those discussions have quickly escalated into claims that widely deployed elliptic curve cryptography (ECC), including ECDSA, is on the verge of collapse.
Rambus Recognized by Forbes as One of America’s Most Successful Mid‑Cap Companies for 2026
https://www.rambus.com/blogs/rambus-recognized-by-forbes-as-one-of-americas-most-successful-mid-cap-companies-for-2026/Rambus is proud to announce that we have been named one of Forbes’ Most Successful Mid‑Cap Companies for 2026, ranking #21 out of 100 companies nationwide. This recognition highlights Rambus’ sustained financial performance, disciplined execution, and continued focus on delivering differentiated semiconductor technologies that address the world’s most demanding compute challenges. ©2026 Forbes Media LLC. […]
Hardware Deployment for Secure AI Using Confidential Computing
https://go.rambus.com/hardware-deployment-for-secure-ai-using-confidential-computing#new_tabAI’s fast evolution is producing autonomous systems that can operate with minimal human oversight, improve themselves and become effective at decision-making in complex environments. These developments require careful consideration of security and privacy. To limit the overhead performance impact (area, throughput, latency and power), hardware-based security solutions can be deployed using state-of-the-art silicon IP.
HBM4E Advances Bandwidth Performance for AI Training
https://event.on24.com/wcc/r/5274733/6F42406D2EB126BF48DDCCAFD5D54751#new_tab[Live on April 8 at 11am PT] Join Rambus for a technical deep dive into HBM4E and the industry-leading HBM4E Memory Controller IP. In this webinar, Nidish Kamath from Rambus will walk through the key requirements driving HBM4E adoption and introduce Rambus’ newly announced HBM4E Memory Controller IP.
Rambus DRAM Tutorial
https://www.rambus.com/rambus-dram-tutorial/This tutorial will describe DRAM architecture in detail, highlighting the similarities and differences between different DRAM technologies and the unique tradeoffs and design choices made to meet system needs. We will also cover the key components that memory transactions travel thorough to get to DRAMs and back, including memory controllers, PHYs, and where applicable, modules and buffer chips. We will describe the architecture of these critical components and discuss how DRAM architecture choices impact their performance and power efficiency. Standard scaling techniques for DRAMs will be highlighted along with challenges that the industry is currently facing. Input from industry experts will show the pros and cons of DRAM architecture choices, demonstrating the system impact and requirements for mainstream adoption. Future DRAM architectures will also be discussed.
HBM4E Controller Product Brief
https://go.rambus.com/hbm4e-controller-product-brief#new_tabDownload the product to learn about the Rambus HBM4E Controller. Our HBM4E Controller is designed to support customers with deploying a new generation of HBM memory for cutting-edge AI accelerators, graphics and high-performance computing (HPC) applications.
HBM4E Controller
https://www.rambus.com/interface-ip/hbm/hbm4e-controller/Rambus offers the industry’s fastest HBM4E Controller IP core designed to support customers with deploying a new generation of HBM memory for cutting-edge AI accelerators, graphics and high-performance computing (HPC) applications.
