At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
Found 3610 Results
Read-Modify-Write (RMW)
https://www.rambus.com/chip-interface-ip-glossary/rmw/Read-Modify-Write ensures atomic memory updates for data integrity and concurrency, vital in ECC-enabled, multi-core, and high-performance systems.
RAS (Reliability, Availability, and Serviceability)
https://www.rambus.com/chip-interface-ip-glossary/ras/RAS is a design philosophy and set of technologies aimed at ensuring that computing systems, especially servers, data centers, and enterprise platforms, operate reliably, remain accessible, and can be serviced efficiently.
Rambus Reports Fourth Quarter and Fiscal Year 2025 Financial Results
https://www.rambus.com/fourth-quarter-and-fiscal-year-2025-financial-results/Achieved record 2025 revenue and earnings results Delivered record quarterly product revenue of $96.8 million, fueling record annual product revenue of $347.8 million, up 41% from 2024 Generated record quarterly and annual cash from operations of $99.8 million and $360.0 million, respectively SAN JOSE, Calif. – February 2, 2026 – Rambus Inc. (NASDAQ:RMBS), a provider […]
Secure by Design Series: UEC Security: Delivering High-Performance, Scalability and Secure Networking for AI and HPC
https://event.on24.com/eventRegistration/EventLobbyServlet?target=reg20.jsp&eventid=5209466&sessionid=1&key=92AA2381476A4900595D2034C1824742&groupId=6549411&sourcepage=register#new_tab[Live on March 19] As AI and HPC workloads accelerate, next-generation data center fabrics must deliver unprecedented throughput without compromising security. The Ultra Ethernet Consortium (UEC) is redefining high-performance networking with a new transport architecture designed for RDMAclass efficiency and massive scale. In this webinar, we will demystify UEC’s security model, purpose-built to protect scale-out […]
Secure by Design Series: Security Certifications: Navigating Standards, Requirements, and Market Expectations
https://event.on24.com/eventRegistration/EventLobbyServlet?target=reg20.jsp&eventid=5209466&sessionid=1&key=92AA2381476A4900595D2034C1824742&groupId=6549411&sourcepage=register#new_tab[Live on March 5] Trust can’t be assumed—it must be demonstrated. This webinar explores how formal security certifications serve as the cornerstone for establishing and maintaining trust in commercial and government-developed security solutions. We will examine key certification frameworks including FIPS 140-3, Common Criteria, NIAP, and ISO21434, focusing on how these standards validate cryptographic implementations, […]
Secure by Design Series: Preparing for the Quantum Era: Practical Approaches to Quantum Safe Cryptography
https://event.on24.com/eventRegistration/EventLobbyServlet?target=reg20.jsp&eventid=5209466&sessionid=1&key=92AA2381476A4900595D2034C1824742&groupId=6549411&sourcepage=register#new_tab[Live on Feb 26] Quantum computing poses a paradigm-shifting threat to classical cryptographic systems, with the potential to break widely used encryption algorithms and compromise sensitive data. In this webinar, we will explore the emerging risks associated with quantum-capable adversaries and what it means to be “quantum safe.”
Secure by Design Series: Inline Memory Encryption & MACsec: Protecting Data in Use and in Motion
https://event.on24.com/eventRegistration/EventLobbyServlet?target=reg20.jsp&eventid=5209466&sessionid=1&key=92AA2381476A4900595D2034C1824742&groupId=6549411&sourcepage=register#new_tab[Live on Feb 19] This webinar will examine two critical technologies that address these challenges: Inline Memory Encryption (IME) and MACsec (Media Access Control Security). We’ll explore how IME protects data as it moves between CPU and memory, defending against physical and side-channel attacks, while MACsec secures Layer 2 Ethernet communications against eavesdropping, replay, and […]
Secure by Design: Tamper-Resistant Security: Hardening Systems Against Attack
https://event.on24.com/eventRegistration/EventLobbyServlet?target=reg20.jsp&eventid=5209466&sessionid=1&key=92AA2381476A4900595D2034C1824742&groupId=6549411&sourcepage=register#new_tabThis presentation will cover fundamentals of tamper-resistant security with a focus on the non-invasive attack technique of side-channel analysis (SCA). Included will be the fundamentals, prevention, and certification.
Port Dual-Mode
https://www.rambus.com/chip-interface-ip-glossary/port-dual-mode/Port Dual-Mode refers to the capability of a hardware interface port, commonly found in high-speed serial communication systems, to operate in two distinct protocol modes.
Pixel to Byte Packing
https://www.rambus.com/chip-interface-ip-glossary/pixel-to-byte-packing/Pixel to Byte Packing converts pixel data into compact byte formats, optimizing memory and bandwidth in display and imaging systems.
