At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
Found 3644 Results
Rambus Initiates $100 Million Accelerated Share Repurchase Program
https://www.rambus.com/rambus-initiates-100-million-accelerated-share-repurchase-program-2/SAN JOSE, Calif., August 5, 2026 – (BUSINESS WIRE) – Rambus Inc. (NASDAQ: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced that it initiated an accelerated share repurchase program with Mizuho Markets Americas LLC, through its agent Mizuho Securities USA LLC (“Dealer”) to repurchase an aggregate of approximately […]
Rambus Reports Second Quarter 2026 Financial Results
https://www.rambus.com/second-quarter-2026-financial-results/Record quarterly revenue of $207.4 million, up 20% year over year, exceeding revenue guidance range GAAP diluted earnings per share of $0.61 and non-GAAP diluted earnings per share of $0.77, exceeding non-GAAP diluted earnings per share guidance range Record product revenue of $99.2 million, up 13% quarter over quarter and 22% year over year Expanded […]
What are DDR5 DIMM Chipsets? The Complete Guide to RCDs, PMICs, SPD Hubs and More
https://www.rambus.com/blogs/complete-guide-to-ddr5-chipsets/Read this blog to learn how DDR5 DIMM chipsets work, why they matter, how they build upon DDR5 technology, and how emerging module architectures such as MRDIMMs are extending memory bandwidth for demanding AI and data center workloads.
PCIe 7.0: Enabling AI Workloads and Infrastructure Disaggregation
https://event.on24.com/wcc/r/5428962/A2A753CA2949D2AFEBAD2FA38A523D25#new_tab[Aug 18 at 11am PT] Join Rambus for a live webinar as we explore the industry’s transition from traditional aggregated servers to modern scale-up, scale-out, and disaggregated architectures. We will also discuss the critical role of PCI Express® (PCIe®) as the foundational interconnect for next-generation infrastructure and explains how PCIe switches and PCIe retimers enable […]
Enabling Next-Generation Data Center Infrastructure for Agentic AI: Introducing the Rambus DDR5 9600 Server RDIMM Chipset
https://www.rambus.com/blogs/enabling-next-generation-data-center-infrastructure-for-agentic-ai-introducing-the-rambus-ddr5-9600-server-rdimm-chipset/As artificial intelligence workloads evolve from model training to real-time inference and autonomous agentic workflows, the demands placed on system memory continue to rise rapidly. The modern data center is constrained not only by compute, increasingly it is defined by memory bandwidth, memory capacity, and power efficiency. To address these challenges, Rambus is introducing the […]
DDR5 RCD 9600 MT/s Product Brief
https://go.rambus.com/ddr5-rcd-9600-product-brief#new_tabThe Rambus Registering Clock Driver (RCD) RCD06 enables DDR5 Registered DIMMs (RDIMMs) operating up to 9600 MT/s. Download this brief to review the RCD functional block diagram, see the specifications and features, and check out the DDR5 RDIMM block diagram.
Rambus Enables Next-Generation AI and Data Center Platforms with DDR5 9600 Server RDIMM Chipset
https://www.rambus.com/rambus-enables-next-generation-ai-and-data-center-platforms-with-ddr5-9600-server-rdimm-chipset/SAN JOSE, Calif. – July 8, 2026 – Rambus Inc. (NASDAQ: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced its DDR5 9600 Server RDIMM chipset designed to deliver industry-leading memory performance for next-generation data center platforms. Built around the new Rambus 6th Generation Registering Clock Driver (RCD06) with a 20% increase in bandwidth over the prior generation, this complete chipset enables RDIMMs operating at up to 9600 MT/s, unlocking a new level of bandwidth and capacity required by agentic AI, high-performance computing (HPC) and other data-intensive workloads.
Data Center Evolution: DDR5 DIMMs Advance Server Performance
https://go.rambus.com/ddr5-dimms-advance-server-performance#new_tabDownload this white paper to explore how DDR5 DIMMs address these emerging requirements, delivering significant advancements in data rate, density, power efficiency, and channel architecture over DDR4. It examines the role of DDR5 as the foundational memory layer in modern AI infrastructure, complementing heterogeneous compute architectures and supporting highly concurrent, data-driven workloads, while also outlining […]
Ask the Experts: PCIe 7 Switch with TDM
https://www.rambus.com/ask-the-experts-pcie-7-switch-with-tdm/Watch the video to learn how PCIe 7 switching enables efficient communication between GPUs, SmartNICs, SuperNICs, storage, and memory resources in large-scale AI deployments.
The Post-Quantum Cryptography Mandate: Building Cryptographically Agile Systems for the Quantum Era
https://www.rambus.com/blogs/the-post-quantum-cryptography-mandate-building-cryptographically-agile-systems-for-the-quantum-era/The transition to post-quantum cryptography (PQC) has moved from research planning to operational execution. Federal policy, emerging procurement requirements, and evolving security standards are accelerating the adoption of quantum resistant cryptography across government and critical infrastructure systems. Recent U.S. government actions, including Executive Order 14409, are accelerating the shift to quantum-resistant cryptography across federal systems […]
