The ARC4-IP-44 (EIP-44) is IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec) up to 5bps @600MHz. Designed for fast integration, low gate count and full transforms, the ARC4-IP-44 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
ARC4 family of accelerators
Available in several configurations / performance grades
Library element for security packet engines
The ARC4-IP-44 is a family of the cryptographic library elements in Inside Secure’s HW IP library. The accelerators include I/O registers, encryption and decryption cores, and the logic for feedback modes and key scheduling.
Sustained performance for any object sizes ranges up to 5Gbps depending on the configuration and area. Gate count is about 7k to 32k gates depending on the configuration.
Inside Secure also offers the AES-IP-39 / EIP-39 that supports AES modes and can be provided including counter measures against side channel attacks and fault injection attacks.
Side-channel attacks conducted against electronic gear are relatively simple and inexpensive to execute. Such attacks include simple power analysis (SPA) and Differential Power Analysis (DPA). As all physical electronic systems routinely leak information, effective side-channel countermeasures should be implemented at the design stage to ensure protection of sensitive keys and data.
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