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ChaCha-IP-13 / EIP-13 ChaCha20 Accelerators

The ChaCha-IP-13 (EIP-13) is IP for accelerating the ChaCha20 cipher algorithm (RFC7539), supporting the NIST CTR mode up to 12.8Gbps @300MHz. Designed for fast integration, low gate count and full transforms, the ChaCha-IP-13 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.

ChaCha20 family of accelerators.

Available in three configurations / performance grades.

Supporting TLS1.3 IoT HomeKit.

How the ChaCha-IP-13 / EIP-13 ChaCha20 Accelerators work

The ChaCha-IP-13 is a family of the cryptographic library elements in Inside Secure’s HW IP library. For example, the ChaCha-IP-13 is the cipher core embedded in the Vault-IP-140 platform security engines providing support for TLS1.3 and HomeKit IoT applications (ChaCha20 is also available as SW implementation in Vault-IP-140). The accelerators include I/O registers, encryption and decryption cores, and the logic for feedback modes and key scheduling.

Sustained performance for any object sizes ranges from 2Gbps to 12.8Gbps depending on the configuration and area. Gate count is around 30K gates depending on the configuration.

Inside Secure also offers the required Poly1305 algorithm to match the ChaCha20 cipher in HomeKit.

CHACHA-IP-13 ChaCa20 Accelerators
CHACHA-IP-13 ChaCa20 Accelerators

ChaCha-IP-13 Information

Key benefits:

  • Silicon-proven implementation.
  • Fast and easy to integrate into SoCs.
  • Flexible layered design.
  • Complete range of configurations.
  • World-class technical support.
 

Features:

  • Wide bus interface (512 bit data, 256 bit keys) or 32 bit register interface.
  • Key sizes: 128 and 256 bits.
  • Includes key scheduling hardware.
  • Feedback mode CTR. 

  • Low speed (High Frequency), Medium Speed, High Speed versions.
  • Fully synchronous design.
Introduction to Side-Channel Attacks eBook

Introduction to Side-Channel Attacks

Side-channel attacks conducted against electronic gear are relatively simple and inexpensive to execute. Such attacks include simple power analysis (SPA) and Differential Power Analysis (DPA). As all physical electronic systems routinely leak information, effective side-channel countermeasures should be implemented at the design stage to ensure protection of sensitive keys and data.

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