[Live 6/11 at 11am PT] Join Rambus and Cadence and learn how they worked together to develop an integrated memory subsystem that is deployed widely in end-customer systems using TSMC advanced nodes. Also discussed will be the signal integrity challenges of implementing GDDR6 and GDDR7 at these high data rates.
Webinars
Unleashing the Performance of AI Training with HBM4
[Live on May 28 @ 11am PT] AI training models are growing in both size and sophistication at a breathtaking rate, requiring ever greater bandwidth and capacity. With its unique 2.5D/3D architecture, HBM4 can deliver Terabytes per second of bandwidth and unprecedented capacity in an extremely compact form factor. Join Kevin Yee from Samsung and Nidish Kamath from Rambus discuss the design considerations of HBM4 memory subsystems (PHY, Memory Controller, and Packaging) in next-generation AI SoCs.
Implementing State-of-the-Art Digital Protection with Rambus CryptoManager Security IP
[Live 4/16 @ 10am PT] Join Parvez Shaik as he discusses the three-tiered CryptoManager architecture and how it can be implemented in chip designs to safeguard against cyber attacks (including emerging quantum-based attacks) and side-channel exploits.
Meeting Automotive Design, Safety and Security Challenges with an Integrated HSM Solution
[Live 3/5 @ 8am PT] Join Omar Alshabibi of ETAS and Adiel Bahrouch of Rambus as they discuss an innovative integrated HSM solution that combines synthesizable Hardware Security Module (HSM) hardware IP with pre-integrated, pre-validated HSM software to meet the needs of automotive OEM and SoC developers.
Root of Trust and Secure Authentication Solutions with Tamper-Resistant PUF Technology
Join experts from Rambus and PUF-based security solutions provider ICTK to learn how Rambus Root of Trust and Secure Authentication solutions combined with ICTK’s PUF technology can provide a highly robust hardware foundation to protect data, devices, and cloud. Our session will provide an overview of ICTK and its PUF technology, discuss the features and benefits of Root of Trust and Secure Authentication solutions, share potential use cases, and conclude with a Q&A session.
Verifying the next generation High Bandwidth Memory controllers for AI and HPC applications
[Live on 10/30 @ 9am PT] High Bandwidth Memory (HBM) has revolutionized AI, machine learning, and High-Performance Computing by significantly increasing data transfer speeds and alleviating performance bottlenecks. The introduction of next-generation HBM4 is especially transformative, enabling faster training and execution of complex AI models. JEDEC has announced that the HBM4 specification is nearing finalization. In this webinar, you will learn how Siemens’s scalable and customizable Avery HBM Verification IP helps companies like Rambus verify their industry-leading HBM4 Controller IP through rigorous testing to ensure reliability and performance.
