GDDR
AI Requires Tailored DRAM Solutions: Part 3
Frank Ferro, Senior Director Product Management at Rambus, and Shane Rau, Senior Research Executive at IDC, recently hosted a webinar that explores the role of
October 29, 2024
At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
GDDR
AI Requires Tailored DRAM Solutions: Part 2
Written by Rambus Press Frank Ferro, Senior Director Product Management at Rambus, and Shane Rau, Senior Research Executive at IDC, recently hosted a webinar that
October 29, 2024
AI & Machine Learning
High-Performance Memory for AI/ML and HPC: Part 2
In part one of this two-part series, Semiconductor Engineering Editor in Chief Ed Sperling and Rambus Sr. Director of Product Management Frank Ferro took a
October 29, 2024
AI & Machine Learning
High-Performance Memory for AI/ML and HPC: Part 1
Semiconductor Engineering Editor in Chief Ed Sperling recently spoke with Rambus Sr. Director of Product Management Frank Ferro about designing high-performance memory subsystems for artificial
October 29, 2024
AI & Machine Learning
Memory a Key Enabler of Continued Advancement of AI/ML
Recently Rambus fellow and distinguished inventor, Steve Woo, had a web chat with Bill Wong, technology editor for Electronic Design, to discuss some of the
October 29, 2024
AI & Machine Learning
Memory Systems for AI: Part 6
In part 5 of this series, we discussed the most common memory systems that are used in the highest performance AI applications. These include on-chip
September 16, 2025
