The module buffers provide an integrated clock and data regeneration. Signals attenuate as they propagate down the memory bus, and if they attenuate too much, the information being transmitted may be lost. The module buffers provide a convenient mechanism for receiving clock and data signals and boosting them to their original signaling levels, increasing signal integrity on the memory bus.
Module buffers enable different bus widths to be used for the buses connecting module buffers (the memory bus), and for the buses connecting a module buffer to the DRAMs on the module (the module bus). To reduce pin count, reduce routing complexity, and save routing space on a motherboard, the memory bus can be narrower than the module bus. In such a system, it is desirable for the bandwidth of the memory bus to be greater than or equal to the bandwidth of the module, meaning that the memory bus operates at a higher frequency than the module bus. To manage the flow of information between two buses of different widths and operating frequencies, the module buffers should be able to perform efficient serial-to-parallel and parallel-to-serial conversion.
Reducing capacitive loading on the memory bus and electrically isolating the DRAMs with a module buffer allows bus speeds to increase, enabling higher per-pin signaling rates and higher bus bandwidths on both the memory bus and the module bus. By doing so, buffered modules provide benefits to many groups:
- End users: By electrically isolating the DRAMs from the memory bus, capacitive loading is decreased. Reduced capacitive loading enables faster bus speeds on both the memory bus and the module bus, increasing system performance. Buffered modules also enable high capacity memory systems to be built that operate at high memory bus speeds – a combination that is essential for achieving high performance in servers.
- Controller and board designers: By enabling high per-pin transfer rates, buffered modules allow controller designers to reduce IO pin counts, which reduces packaging costs, component count, routing area, and routing complexity.
- Module manufacturers: Electrically isolating the memory bus from the module buses allows the module buses to be shorter. These buses do not have to cross connectors, enhancing signal integrity on the module.