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Home > Events > D&R IP SoC-Silicon Valley

D&R IP SoC-Silicon Valley


Event Details

  • Date: April 26, 2022
  • Venue: Computer History Museum

Join us at D&R IP SoC-Silicon Valley! Our interface and security IP experts will be giving presentations about the future of chips, HBM3, and automotive security. Presentation, abstract, and speaker information below. We hope to see you at the event!

Title: Silicon IP is Key to the Future of Chips
Speaker: Neeraj Paliwal, General Manager of Security IP, Rambus
Abstract: With the increasing functional density of semiconductors enabled by Moore’s Law, chip makers can provide customers incredibly powerful solutions tailored to their specific application needs. The rise of the silicon IP industry enables chip architects to focus on core competencies that differentiate their products while accessing best-in-class IP blocks for complementary capabilities. Security functionality is a great illustration of this trend as discrete hardware security modules are increasingly being transitioned to embedded security cores in a broad range of chips. In the hyper-competitive semiconductor market, the capabilities provided by the silicon IP industry help chip makers meet their ambitious performance goals while reducing time to market.

Title: Memory Bandwidth for AI/ML Races Higher with HBM3
Speaker: Frank Ferro, Senior Director of Product Management, Interface IP, Rambus
Abstract: With the insatiable need for higher bandwidth in state-of-the-art AI/ML training and HPC, the HBM standard has been on a rapid pace of improvement. The newly standardized HBM3 generation doubles the data rate to 6.4 Gb/s that offers up to 819 GB/s of memory bandwidth between an accelerator and a single HBM3 DRAM device. Memory interface technology expert, Frank Ferro will discuss how the Rambus 8.4 Gb/s HBM3 Memory Subsystem can provide the headroom and scalability needed for implementing state-of-the-art HBM designs.

Title: Securing Automotive  Semiconductors in the  New Centralized Car  Architecture
Speaker: Thierry Kouthon, Product Manager, Security IP, Rambus
Abstract: Modern automobiles contain up to 100 Electronic Control Units (ECUs) or more. Particularly with the increasing adoption of Advanced Driver Assistance Systems (ADAS), cars are data centers on wheels. Cybersecurity is a growing imperative given widely publicized spectacular exploits and threats to both life and property. The automotive industry has identified Hardware Security Modules (HSM) embedded in ECUs as a viable and effective way to address automotive cybersecurity. Thierry Kouthon will discuss how ASIL-B/D and FIPS-certified root of trust solutions can be implemented as embedded HSMs in automotive chips.

To learn more and register for the event, click here: https://www.design-reuse-embedded.com/ipsocdays/2022/SiliconValley/

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