The Rambus DDR4 memory PHY delivers industry-leading data rates of up to 3200 Mbps and is compatible with the DDR4 and DDR3 standards. The PHY consists of a Command/Address (C/A) macro cell and Data (DQ) macro cells configured to create a 72-bit wide channel.
The Northwest Logic DDR4 controller maximizes memory bus efficiency via Look-Ahead command processing, bank management, auto-precharge and additive latency support. The core is DFI compatible and supports a range of interfaces to user logic.
The Rambus DDR4 PHY and Northwest Logic DDR4 controller used together comprise a complete DDR4 memory interface subsystem. Alternatively, these cores can be licensed separately to be paired with 3rd-party DDR4 controller or PHY solutions.
Engineering Design Services:
|Protocol||Data Rate (Mbps) Max.||Application|
|DDR4||1600 to 3200||Data Center, Edge|
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