Interface IP chip icon

Interface IP

CSI-2 Controller Core

The Rambus CSI-2 controller core is a second-generation MIPI CSI-2 core optimized for high performance, low power and small size. The core is fully compliant with the CSI-2 standard and implements all three layers defined therein: Pixel to Byte Packing, Low Level Protocol, and Lane Management.

CSI-2 Controller V2 Block Diagram (Receive Version)
CSI-2 Controller V2 Block Diagram (Receive Version)

Next-Generation Displays: An Integrated IP Solution from Mixel, Rambus & Hardent

Displays for next-generation smartphones, AR/VR devices, and automotive systems all require more bandwidth than ever before. Using a combination of VESA Display Stream Compression (DSC) with the MIPI Display Serial Interface (DSI-2) technology, designers can achieve display resolutions up to 8K without compromise to video quality, battery life or cost.

Solution Offerings

Protocol Compatibility

ProtocolData Rate (Gbps) Application
CSI-22.5+Mobile, IoT
MIPI Drives Performance for Next-Generation Displays

MIPI Drives Performance for Next-Generation Displays

MIPI® Alliance technology has helped enable the dramatic growth of the mobile phone market. The function and capabilities of MIPI interface solutions have grown dramatically as well. MIPI DSI-2 SM has become the leading display interface across a growing range of products including smartphones, AR/VR, IoT appliances and ADAS/autonomous vehicles. As the application space has expanded, so too have the performance requirements. Learn how MIPI DSI-2 interface and VESA® DSC visually lossless compression technologies can meet the challenges of next-generation displays.