At Rambus, we create cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.
DDR3 Controller
The Rambus DDR3 controller core (formerly from Northwest Logic) is designed for high memory throughput, high clock rates, and full programmability in computing and networking applications. With the Rambus DDR3 PHY it comprises a complete DDR3 memory interface subsystem.
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Product BriefHow the DDR3 Interface Subsystem works
The Rambus DDR3 controller maximizes memory bus efficiency via Look-Ahead command processing, bank management, auto-precharge and additive latency support. The core is DFI compatible and supports a range of interfaces to user logic.
The Rambus DDR3 memory PHY is fully compatible with DDR3 at 1.5V and DDR3L at 1.35V and scalable to 2133Mbps. The PHY has undergone extensive design-phase modeling and simulation of alternative SOC, package and PCB environments to ease implementation and enable first-time-right designs.
The Rambus DDR3 PHY and DDR3 controller used together comprise a complete DDR3 memory interface subsystem. Alternatively, these cores can be licensed separately to be paired with 3rd-party DDR3 controller or PHY solutions.
Solution Offerings
- Maximizes bus efficiency via look-ahead command processing, bank management, auto-precharge and additive latency support
- Latency minimized via parameterized pipelining
- Achieves high clock rates with minimal routing constraints
- Supports full-rate and half-rate clock operation
- Multi-mode controller support
- Full run-time configurable timing parameters and memory settings
- Supports ODT, dynamic ODT, 2T timing and write leveling calibration
- DFI compatible
- Full set of Add-On cores available
- Minimal ASIC gate count
- Broad range of ASIC and FPGA platforms supported
- Delivered fully integrated and verified with target PHY
- Core (source code)
- Testbench (source code)
- Complete documentation
- Expert technical support
- Maintenance updates
Engineering Design Services:
- Customization
- SoC integration
Protocol Compatibility
| Protocol | Data Rate (Mbps) Max. | Application |
|---|---|---|
| DDR3 | 800 to 2133 | IoT, Edge |
