Thomas Vogelsang

Thomas Vogelsang

Fellow 

Research Areas: DRAM Memory Devices and Systems

Computer memory has interested me since the beginning of my career. While I started in device physics, over the years my research focus moved to circuit design and system usage of DRAM without losing the foundation of understanding details down to the transistor and manufacturing process level.

Accessing large capacities of memory with high bandwidth, low latency, and low power is becoming even more important in the age of huge AI models. Finding ways to improve memory in these areas continues to fascinate me.

Between my elementary school days and today, I’ve come to see inventing as a competitive sport. There is unquestionably a race to get the best idea on file at the patent office before your competitors do. I find this aspect of invention very compelling, as multiple groups of very talented people across the world are trying to find the most elegant solutions to big, valuable problems. I am proud to have reached the threshold of 100 unique patent filings during my time at Rambus.

At Rambus, I’m allowed the opportunity of open-ended exploration, something I thoroughly enjoy as an inventor. While I mostly worked on memory during my time at Rambus, I had also the opportunity to explore imaging during the development of Binary Pixel technology.

Education

  • Diplom Physiker (Universität) and Doctor rerum naturae in physics, both from the Technical University in Munich, Germany

Selected Publications

  • M. Babaie, A. Akram, …, T. Vogelsang et al. “Efficient Caching with a Tag-enhanced DRAM.” International Symposium on High-performance Compute Architecture, Las Vegas, Nevada, March 2025.
  • Vogelsang, Thomas, Brent Haukness, Eric Linstadt, Torsten Partsch, and James Tringali. “DRAM refresh with master wordline granularity control of refresh intervals: position paper.” In Proceedings of the International Symposium on Memory Systems, pp. 1-6. 2021.
  • Wang, Fiona, Thomas Vogelsang, Brent Haukness, and Stephen C. Magee. “DRAM retention at cryogenic temperatures.” In 2018 IEEE International Memory Workshop (IMW), pp. 1-4. IEEE, 2018.
  • T. Vogelsang, M. Guidash, S. Xue, Overcoming the Full Well Capacity Limit: High Dynamic Range Imaging Using Multi-Bit Temporal Oversampling and Conditional Reset, International Image Sensors Workshop, Snowbird Utah, June 2013.
  • T. Vogelsang and D. Stork, High-Dynamic-Range Binary Pixel Processing Using Non-Destructive Reads and Variable Oversampling and Thresholds, IEEE Sensors, Taipei, Oct 2012.
  • T. Vogelsang, Understanding the Energy Consumption of Dynamic Random Access Memories, 43rd Annual IEEE/ACM International Symposium on Microarchitecture, Atlanta, Dec 2010
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